Neuromorphic computing: From devices to integrated circuits

A variety of nonvolatile memory (NVM) devices including the resistive Random Access Memory (RRAM) are currently being investigated for implementing energy-efficient hardware for deep learning and artificial intelligence at the edge. RRAM devices are employed in the form of dense crosspoint or crossbar arrays. In order to exploit the high-density and low-power operation of these devices, circuit designers need to accommodate their nonideal behavior and consider their impact on circuit design and algorithm performance. Hybrid integration of RRAMs with standard CMOS technology is spurring the development of large-scale neuromorphic system-on-a-chip. This review article provides an overview of neuromorphic integrated circuits (ICs) using hybrid CMOS-RRAM integration with an emphasis on spiking neural networks (SNNs), device nonidealities, their associated circuit design challenges, and potential strategies for their mitigation. An overview of various SNN learning algorithms and their codevelopment with devices and circuits is discussed. Finally, a comparison of NVM-based fully integrated neuromorphic ICs is presented along with a discussion on their future evolution.