模拟前端和电源管理集成在0.13 /spl mu/m CMOS ADSL SoC上

2021 International Conference on IC Design and Technology (ICICDT) Pub Date : 2004-10-04 DOI:10.1109/ICICDT.2004.1309944

Sandeep Oswal, Fernando A. Mujica, S. Prasad, R. Srinivasa, B. Sharma, A. Raychoudhary, H. Khasnis, Anmol Sharma, R. Sriram, B. Vijayvardhan, R. Menon, R. Gireesh, Nilesh A. Ahuja, M. Gambhir, Mangesh Sadafale

{"title":"模拟前端和电源管理集成在0.13 /spl mu/m CMOS ADSL SoC上","authors":"Sandeep Oswal, Fernando A. Mujica, S. Prasad, R. Srinivasa, B. Sharma, A. Raychoudhary, H. Khasnis, Anmol Sharma, R. Sriram, B. Vijayvardhan, R. Menon, R. Gireesh, Nilesh A. Ahuja, M. Gambhir, Mangesh Sadafale","doi":"10.1109/ICICDT.2004.1309944","DOIUrl":null,"url":null,"abstract":"This paper describes the analog and power management aspects of a single chip asymmetric digital subscriber line (ADSL) customer premises equipment (CPE) router. We address the system partitioning between analog and digital resulting in optimum system cost and performance for a .13 /spl mu/m CMOS process.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"108 1","pages":"193-198"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analog front-end and power management integration on a 0.13 /spl mu/m CMOS ADSL SoC\",\"authors\":\"Sandeep Oswal, Fernando A. Mujica, S. Prasad, R. Srinivasa, B. Sharma, A. Raychoudhary, H. Khasnis, Anmol Sharma, R. Sriram, B. Vijayvardhan, R. Menon, R. Gireesh, Nilesh A. Ahuja, M. Gambhir, Mangesh Sadafale\",\"doi\":\"10.1109/ICICDT.2004.1309944\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the analog and power management aspects of a single chip asymmetric digital subscriber line (ADSL) customer premises equipment (CPE) router. We address the system partitioning between analog and digital resulting in optimum system cost and performance for a .13 /spl mu/m CMOS process.\",\"PeriodicalId\":6737,\"journal\":{\"name\":\"2021 International Conference on IC Design and Technology (ICICDT)\",\"volume\":\"108 1\",\"pages\":\"193-198\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 International Conference on IC Design and Technology (ICICDT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICDT.2004.1309944\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on IC Design and Technology (ICICDT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2004.1309944","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

本文介绍了单芯片非对称数字用户线路(ADSL)客户端设备(CPE)路由器的模拟和电源管理方面。我们解决了模拟和数字之间的系统划分，从而实现了0.13 /spl mu/m CMOS工艺的最佳系统成本和性能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

Analog front-end and power management integration on a 0.13 /spl mu/m CMOS ADSL SoC

This paper describes the analog and power management aspects of a single chip asymmetric digital subscriber line (ADSL) customer premises equipment (CPE) router. We address the system partitioning between analog and digital resulting in optimum system cost and performance for a .13 /spl mu/m CMOS process.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2021 International Conference on IC Design and Technology (ICICDT)

自引率

0.00%

发文量