Zhaofeng Huang, Yuze Niu, Wengao Lu, Guangyi Chen, Yi Li, S. Zhang, Zhongjian Chen
{"title":"基于16位单斜率的像素级ADC,用于15μm间距640×512 MWIR fpa","authors":"Zhaofeng Huang, Yuze Niu, Wengao Lu, Guangyi Chen, Yi Li, S. Zhang, Zhongjian Chen","doi":"10.1109/ISCAS.2018.8351099","DOIUrl":null,"url":null,"abstract":"This paper presents a pixel-level ADC for 640×512 mid-wavelength infrared focal plane arrays. The pulse comparator for windowed signal used in the single-slope structure proposed in this work obtains lower power consumption and lower RMS noise than conventional designs. Moreover, by employing a novel low-load 3T NMOS memory structure, hardware cost can be reduced. The pixel circuit with 15μm-pitch has been designed in the 0.18um 1P6M CMOS process. Power consumption of the pixel-level ADC is 0.107μW and the charge handling capacity is 10Me− per pixel. Depending on the simulation results, an average output RMS noise of 2LSB and a maximum nonlinearity of 0.15% are demonstrated.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"35 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A 16-bit Single-Slope based Pixel-level ADC for 15μm-pitch 640×512 MWIR FPAs\",\"authors\":\"Zhaofeng Huang, Yuze Niu, Wengao Lu, Guangyi Chen, Yi Li, S. Zhang, Zhongjian Chen\",\"doi\":\"10.1109/ISCAS.2018.8351099\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a pixel-level ADC for 640×512 mid-wavelength infrared focal plane arrays. The pulse comparator for windowed signal used in the single-slope structure proposed in this work obtains lower power consumption and lower RMS noise than conventional designs. Moreover, by employing a novel low-load 3T NMOS memory structure, hardware cost can be reduced. The pixel circuit with 15μm-pitch has been designed in the 0.18um 1P6M CMOS process. Power consumption of the pixel-level ADC is 0.107μW and the charge handling capacity is 10Me− per pixel. Depending on the simulation results, an average output RMS noise of 2LSB and a maximum nonlinearity of 0.15% are demonstrated.\",\"PeriodicalId\":6569,\"journal\":{\"name\":\"2018 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"volume\":\"35 1\",\"pages\":\"1-5\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-05-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2018.8351099\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2018.8351099","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 16-bit Single-Slope based Pixel-level ADC for 15μm-pitch 640×512 MWIR FPAs
This paper presents a pixel-level ADC for 640×512 mid-wavelength infrared focal plane arrays. The pulse comparator for windowed signal used in the single-slope structure proposed in this work obtains lower power consumption and lower RMS noise than conventional designs. Moreover, by employing a novel low-load 3T NMOS memory structure, hardware cost can be reduced. The pixel circuit with 15μm-pitch has been designed in the 0.18um 1P6M CMOS process. Power consumption of the pixel-level ADC is 0.107μW and the charge handling capacity is 10Me− per pixel. Depending on the simulation results, an average output RMS noise of 2LSB and a maximum nonlinearity of 0.15% are demonstrated.