基于Ge/Si虚拟衬底的Space III-V型多结太阳能电池

I. García, I. Rey‐Stolle, M. Hinojosa, I. Lombardero, L. Cifuentes, C. Algora, H. Nguyen, A. Morgan, Andrew J. Johnson
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引用次数: 4

摘要

在硅基板上直接沉积薄Ge层的虚拟衬底近年来取得了很高的质量。在这项工作中,分析了它们作为低成本,可移动基板的应用,以生长用于空间应用的高效,轻量化和柔性多结太阳能电池。实验Ge单结太阳能电池和GaInP/Ga(In)As/Ge三结太阳能电池使用Ge/Si虚拟衬底作为有源底结(即Si无活性),使用具有$5\ \boldsymbol{\mu} \mathbf{m}$ Ge层厚度的中等质量Ge/Si虚拟衬底实现。与标准衬底相比,Ge材料的质量较低,但对于标准三结来说,载流子收集效率足够高。由于与硅衬底的热膨胀系数不匹配,在生长过程中预期形成的裂纹被证实,并且被发现是太阳能电池性能的主要限制因素。讨论了诸如减薄Ge + III-V结构和最小化生长过程中的热循环等策略。利用内嵌多孔硅层作为应变缓冲层的研究正在进行中。这种多孔层也可以作为牺牲层,用于制造轻量化和柔性多结电池的高通量机械外延提升。这些嵌入的多孔硅层需要设计以获得最佳性能,并与Ge和III-V沉积工艺兼容。
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Space III-V Multijunction Solar Cells on Ge/Si virtual substrates
Virtual substrates based on thin Ge layers on Si substrates by direct deposition have recently achieved high quality. In this work, their application as low cost, removable substrates for the growth of high efficiency, lightweight and flexible multijunction solar cells for space applications is analyzed. Experimental Ge single-junction solar cells and GaInP/Ga(In)As/Ge triple-junction solar cells using the Ge/Si virtual substrate as an active bottom junction (being the Si inactive), are implemented using medium quality Ge/Si virtual substrates with a $5\ \boldsymbol{\mu} \mathbf{m}$ Ge layer thickness. A lower quality in the Ge material, as compared to standard substrates, but enough carrier collection efficiency for a standard triple-junction, are shown. The expected formation of cracks during growth, due to the large thermal expansion coefficient mismatch with the Si substrate, is confirmed, and is found to be a major limiting factor for the performance of the solar cells. Strategies such as thinning the Ge + III-V structure and minimizing the thermal cycling during growth are discussed. Using an embedded porous Si layer to serve as buffer for the strain is being investigated. This porous layer could also serve as sacrificial layer for high throughput mechanical epitaxial lift-off in the manufacturing of lightweight and flexible multijunction cells. These embedded porous Si layers need to be engineered for optimum performance and compatibility with the Ge and III-V deposition processes.
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