低功耗下纳米器件的时域加权和计算

T. Morie, Haichao Liang, Takashi Tohara, Hirofumi Tanaka, M. Igarashi, S. Samukawa, K. Endo, Yasuo Takahashi
{"title":"低功耗下纳米器件的时域加权和计算","authors":"T. Morie, Haichao Liang, Takashi Tohara, Hirofumi Tanaka, M. Igarashi, S. Samukawa, K. Endo, Yasuo Takahashi","doi":"10.1109/NANO.2016.7751490","DOIUrl":null,"url":null,"abstract":"This paper introduces a time-domain weighted-sum calculation operation based on a spiking neuron model, and discusses a resistance-capacitance circuit that performs a calculation operation assumed to be realized in CMOS VLSI technology. A nanodevice that executes this calculation is also presented. The calculation circuit is useful for extremely low power operation. This operation uses the rising slopes of post-synaptic potentials triggered by input spike pulses. In the time-domain calculation circuit, the energy dissipation is independent of the resistance, and only depends on the capacitance and voltages. However, the time constant, which is the product of the resistance and capacitance, should be relatively large to guarantee the calculation resolution, and therefore the resistance should be at the giga-ohms levels. The nanodevice consists of a nanodisk array connected with a fin field-effect transistor. Nanodisk arrays can be fabricated using a self-assembly bio-nano-template technique, and they act as resistors with resistance levels of several giga-ohms. A weighted sum can be achieved with an energy dissipation on the order of 1 fJ, with a number of inputs that can be more than 100. This amount of energy is several orders of magnitude lower than that of conventional digital processors.","PeriodicalId":6646,"journal":{"name":"2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO)","volume":"23 1","pages":"390-392"},"PeriodicalIF":0.0000,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Spike-based time-domain weighted-sum calculation using nanodevices for low power operation\",\"authors\":\"T. Morie, Haichao Liang, Takashi Tohara, Hirofumi Tanaka, M. Igarashi, S. Samukawa, K. Endo, Yasuo Takahashi\",\"doi\":\"10.1109/NANO.2016.7751490\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces a time-domain weighted-sum calculation operation based on a spiking neuron model, and discusses a resistance-capacitance circuit that performs a calculation operation assumed to be realized in CMOS VLSI technology. A nanodevice that executes this calculation is also presented. The calculation circuit is useful for extremely low power operation. This operation uses the rising slopes of post-synaptic potentials triggered by input spike pulses. In the time-domain calculation circuit, the energy dissipation is independent of the resistance, and only depends on the capacitance and voltages. However, the time constant, which is the product of the resistance and capacitance, should be relatively large to guarantee the calculation resolution, and therefore the resistance should be at the giga-ohms levels. The nanodevice consists of a nanodisk array connected with a fin field-effect transistor. Nanodisk arrays can be fabricated using a self-assembly bio-nano-template technique, and they act as resistors with resistance levels of several giga-ohms. A weighted sum can be achieved with an energy dissipation on the order of 1 fJ, with a number of inputs that can be more than 100. This amount of energy is several orders of magnitude lower than that of conventional digital processors.\",\"PeriodicalId\":6646,\"journal\":{\"name\":\"2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO)\",\"volume\":\"23 1\",\"pages\":\"390-392\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NANO.2016.7751490\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2016.7751490","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

摘要

本文介绍了一种基于尖峰神经元模型的时域加权和计算运算,并讨论了一种可以在CMOS VLSI技术中实现计算运算的电阻-电容电路。本文还介绍了一个执行此计算的纳米器件。该计算电路适用于极低功耗的工作。该操作利用输入脉冲触发的突触后电位的上升斜率。在时域计算电路中,能量耗散与电阻无关,只与电容和电压有关。但是,为了保证计算分辨率,时间常数(电阻和电容的乘积)应该比较大,因此电阻应该在千兆欧级别。该纳米器件由与翅片场效应晶体管连接的纳米磁盘阵列组成。纳米磁盘阵列可以使用自组装生物纳米模板技术制造,并且它们可以作为电阻,其电阻水平可达数万亿欧姆。加权和的能量耗散约为1fj,输入个数可大于100。这种能量比传统的数字处理器低几个数量级。
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Spike-based time-domain weighted-sum calculation using nanodevices for low power operation
This paper introduces a time-domain weighted-sum calculation operation based on a spiking neuron model, and discusses a resistance-capacitance circuit that performs a calculation operation assumed to be realized in CMOS VLSI technology. A nanodevice that executes this calculation is also presented. The calculation circuit is useful for extremely low power operation. This operation uses the rising slopes of post-synaptic potentials triggered by input spike pulses. In the time-domain calculation circuit, the energy dissipation is independent of the resistance, and only depends on the capacitance and voltages. However, the time constant, which is the product of the resistance and capacitance, should be relatively large to guarantee the calculation resolution, and therefore the resistance should be at the giga-ohms levels. The nanodevice consists of a nanodisk array connected with a fin field-effect transistor. Nanodisk arrays can be fabricated using a self-assembly bio-nano-template technique, and they act as resistors with resistance levels of several giga-ohms. A weighted sum can be achieved with an energy dissipation on the order of 1 fJ, with a number of inputs that can be more than 100. This amount of energy is several orders of magnitude lower than that of conventional digital processors.
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