Shuang Sun, Baotong Zhang, Yuancheng Yang, X. An, Xiaoyan Xu, Ru Huang, Ming Li
{"title":"通过TMAH湿法化学刻蚀制备具有(001)面和方向的矩形悬浮单晶硅纳米线","authors":"Shuang Sun, Baotong Zhang, Yuancheng Yang, X. An, Xiaoyan Xu, Ru Huang, Ming Li","doi":"10.1109/CSTIC49141.2020.9282559","DOIUrl":null,"url":null,"abstract":"In this study, a kind of rectangular suspended single crystal Si nanowire with (001) planes and along <001> direction is developed via a CMOS-compatible top-down scheme. In this scheme, the nanowires are formed by anisotropic etching of TMAH on different silicon crystallography orientations. By designing the initial orientations of hard mask patterns, the rectangular suspended silicon nanowires can be successfully fabricated without any sacrificial epitaxial layers. Due to the damage-free process and the high mobility on (001) planes, this scheme will provide a high-quality channel for the future gate-alI-around silicon transistor technology.","PeriodicalId":6848,"journal":{"name":"2020 China Semiconductor Technology International Conference (CSTIC)","volume":"33 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Rectangular suspended single crystal Si nanowire with (001) planes and <001> direction developed via TMAH wet chemical etching\",\"authors\":\"Shuang Sun, Baotong Zhang, Yuancheng Yang, X. An, Xiaoyan Xu, Ru Huang, Ming Li\",\"doi\":\"10.1109/CSTIC49141.2020.9282559\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, a kind of rectangular suspended single crystal Si nanowire with (001) planes and along <001> direction is developed via a CMOS-compatible top-down scheme. In this scheme, the nanowires are formed by anisotropic etching of TMAH on different silicon crystallography orientations. By designing the initial orientations of hard mask patterns, the rectangular suspended silicon nanowires can be successfully fabricated without any sacrificial epitaxial layers. Due to the damage-free process and the high mobility on (001) planes, this scheme will provide a high-quality channel for the future gate-alI-around silicon transistor technology.\",\"PeriodicalId\":6848,\"journal\":{\"name\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"volume\":\"33 1\",\"pages\":\"1-3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC49141.2020.9282559\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 China Semiconductor Technology International Conference (CSTIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC49141.2020.9282559","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Rectangular suspended single crystal Si nanowire with (001) planes and <001> direction developed via TMAH wet chemical etching
In this study, a kind of rectangular suspended single crystal Si nanowire with (001) planes and along <001> direction is developed via a CMOS-compatible top-down scheme. In this scheme, the nanowires are formed by anisotropic etching of TMAH on different silicon crystallography orientations. By designing the initial orientations of hard mask patterns, the rectangular suspended silicon nanowires can be successfully fabricated without any sacrificial epitaxial layers. Due to the damage-free process and the high mobility on (001) planes, this scheme will provide a high-quality channel for the future gate-alI-around silicon transistor technology.