F. Cacho, A. Benhassain, S. Mhira, A. Sivadasan, V. Huard, P. Cathelin, V. Knopik, A. Jain, C. Parthasarathy, L. Anghel
{"title":"活动分析:审查不同的解决方案，以开发可靠和高性能的设计","authors":"F. Cacho, A. Benhassain, S. Mhira, A. Sivadasan, V. Huard, P. Cathelin, V. Knopik, A. Jain, C. Parthasarathy, L. Anghel","doi":"10.1109/IOLTS.2016.7604670","DOIUrl":null,"url":null,"abstract":"Reliability for advanced CMOS nodes is becoming very challenging. The trade-off between high performance and reliability requirement can no longer be addressed by rough extra-margin. It would results in an overdesign and strong penalty of performance and area. A fine-grain analysis of mission profile is the path toward accurate assessment of ageing. A wide review of methodologies and results are presented, they are applied to digital, analog and RF/mmW circuits. Important set of experimental results are shown and compared to simulation. This paper highlights the correlation between activity profiling or workload and degradation performance induced by ageing.","PeriodicalId":6580,"journal":{"name":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","volume":"8 1","pages":"47-50"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Activity profiling: Review of different solutions to develop reliable and performant design\",\"authors\":\"F. Cacho, A. Benhassain, S. Mhira, A. Sivadasan, V. Huard, P. Cathelin, V. Knopik, A. Jain, C. Parthasarathy, L. Anghel\",\"doi\":\"10.1109/IOLTS.2016.7604670\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Reliability for advanced CMOS nodes is becoming very challenging. The trade-off between high performance and reliability requirement can no longer be addressed by rough extra-margin. It would results in an overdesign and strong penalty of performance and area. A fine-grain analysis of mission profile is the path toward accurate assessment of ageing. A wide review of methodologies and results are presented, they are applied to digital, analog and RF/mmW circuits. Important set of experimental results are shown and compared to simulation. This paper highlights the correlation between activity profiling or workload and degradation performance induced by ageing.\",\"PeriodicalId\":6580,\"journal\":{\"name\":\"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)\",\"volume\":\"8 1\",\"pages\":\"47-50\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-07-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IOLTS.2016.7604670\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IOLTS.2016.7604670","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Activity profiling: Review of different solutions to develop reliable and performant design
Reliability for advanced CMOS nodes is becoming very challenging. The trade-off between high performance and reliability requirement can no longer be addressed by rough extra-margin. It would results in an overdesign and strong penalty of performance and area. A fine-grain analysis of mission profile is the path toward accurate assessment of ageing. A wide review of methodologies and results are presented, they are applied to digital, analog and RF/mmW circuits. Important set of experimental results are shown and compared to simulation. This paper highlights the correlation between activity profiling or workload and degradation performance induced by ageing.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
