{"title":"单三角桥单元模块化多电平级联变换器(MMCC-SDBC)直流链路电容电压振荡抑制方法","authors":"Takaaki Tanaka, Huai Wang, F. Blaabjerg","doi":"10.23919/IPEC.2018.8507527","DOIUrl":null,"url":null,"abstract":"This paper proposes a capacitor voltage oscillation reduction method by using third harmonic zero-sequence current for Modular Multilevel Cascade Converter (MMCC) with Single Delta Bridge Cells (SDBC). A practical case study on an 80 MVar/ 33 kV MMCC-SDBC based STATCOM is used to demonstrate the method. The impact of the third harmonic zero-sequence current level of the capacitor oscillation reduction and the electro-thermal stresses on IGBT modules is investigated. An optimal parameter of the current level is obtained by compromising the above two performance factors. The capacitor bank volume is reduced by 23 % by applying the proposed method.","PeriodicalId":6610,"journal":{"name":"2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)","volume":"27 1","pages":"2604-2610"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A DC-link Capacitor Voltage Oscillation Reduction Method for a Modular Multilevel Cascade Converter with Single Delta Bridge Cells (MMCC-SDBC)\",\"authors\":\"Takaaki Tanaka, Huai Wang, F. Blaabjerg\",\"doi\":\"10.23919/IPEC.2018.8507527\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a capacitor voltage oscillation reduction method by using third harmonic zero-sequence current for Modular Multilevel Cascade Converter (MMCC) with Single Delta Bridge Cells (SDBC). A practical case study on an 80 MVar/ 33 kV MMCC-SDBC based STATCOM is used to demonstrate the method. The impact of the third harmonic zero-sequence current level of the capacitor oscillation reduction and the electro-thermal stresses on IGBT modules is investigated. An optimal parameter of the current level is obtained by compromising the above two performance factors. The capacitor bank volume is reduced by 23 % by applying the proposed method.\",\"PeriodicalId\":6610,\"journal\":{\"name\":\"2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)\",\"volume\":\"27 1\",\"pages\":\"2604-2610\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-10-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/IPEC.2018.8507527\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IPEC.2018.8507527","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A DC-link Capacitor Voltage Oscillation Reduction Method for a Modular Multilevel Cascade Converter with Single Delta Bridge Cells (MMCC-SDBC)
This paper proposes a capacitor voltage oscillation reduction method by using third harmonic zero-sequence current for Modular Multilevel Cascade Converter (MMCC) with Single Delta Bridge Cells (SDBC). A practical case study on an 80 MVar/ 33 kV MMCC-SDBC based STATCOM is used to demonstrate the method. The impact of the third harmonic zero-sequence current level of the capacitor oscillation reduction and the electro-thermal stresses on IGBT modules is investigated. An optimal parameter of the current level is obtained by compromising the above two performance factors. The capacitor bank volume is reduced by 23 % by applying the proposed method.