Yurong Cao, Hu Li, Zhe Feng, Zujun Ji, Zhengyuan Zhao, Jessie Y.C. Chen, Youfeng Xu, Xiang Peng, Feng Ji
{"title":"BSI过程中起屑的原因及改进方法研究","authors":"Yurong Cao, Hu Li, Zhe Feng, Zujun Ji, Zhengyuan Zhao, Jessie Y.C. Chen, Youfeng Xu, Xiang Peng, Feng Ji","doi":"10.1109/CSTIC49141.2020.9282550","DOIUrl":null,"url":null,"abstract":"The causes and improving methods of chipping were studied from CMP (Chemical Mechanical Polishing) and Trim1 (First Trimming process before bonding) perspectives. Chipping is caused by worse wafer edge bonding quality which is impacted by wafer edge pattern step-height and edge profile. Increasing CMP remove amount could reduce step-height and improve chipping performance. Bias of carrier wafer WEE (Wafer Edge Exposure) and Trim1 width should be fixed for better extreme edge bonding quality, which brings better chipping performance.","PeriodicalId":6848,"journal":{"name":"2020 China Semiconductor Technology International Conference (CSTIC)","volume":"162 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Study of Causes and Improving Methods of Chipping in BSI Process\",\"authors\":\"Yurong Cao, Hu Li, Zhe Feng, Zujun Ji, Zhengyuan Zhao, Jessie Y.C. Chen, Youfeng Xu, Xiang Peng, Feng Ji\",\"doi\":\"10.1109/CSTIC49141.2020.9282550\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The causes and improving methods of chipping were studied from CMP (Chemical Mechanical Polishing) and Trim1 (First Trimming process before bonding) perspectives. Chipping is caused by worse wafer edge bonding quality which is impacted by wafer edge pattern step-height and edge profile. Increasing CMP remove amount could reduce step-height and improve chipping performance. Bias of carrier wafer WEE (Wafer Edge Exposure) and Trim1 width should be fixed for better extreme edge bonding quality, which brings better chipping performance.\",\"PeriodicalId\":6848,\"journal\":{\"name\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"volume\":\"162 1\",\"pages\":\"1-3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC49141.2020.9282550\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 China Semiconductor Technology International Conference (CSTIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC49141.2020.9282550","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Study of Causes and Improving Methods of Chipping in BSI Process
The causes and improving methods of chipping were studied from CMP (Chemical Mechanical Polishing) and Trim1 (First Trimming process before bonding) perspectives. Chipping is caused by worse wafer edge bonding quality which is impacted by wafer edge pattern step-height and edge profile. Increasing CMP remove amount could reduce step-height and improve chipping performance. Bias of carrier wafer WEE (Wafer Edge Exposure) and Trim1 width should be fixed for better extreme edge bonding quality, which brings better chipping performance.
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