{"title":"封装对1.2 kV SiC模块模拟性能的影响","authors":"Zichen Miao, Yincan Mao, K. Ngo, Woochan Kim","doi":"10.1109/WIPDA.2015.7369301","DOIUrl":null,"url":null,"abstract":"Power modules with well-behaved terminal waveforms could still have their dice suffering from false triggering. Immunities to false triggering and current unbalance, and switching energy of four commercial 1.2 kV SiC modules (modules A, B, C, and D) are compared by studying the simulated channel current of each MOSFET die in the presence of packages' parasitic impedances. For module B, gate inductance and Kelvin-source inductance of the low-side switch reaches 111 nH and 103 nH, respectively, and 15 Ω gate resistor is added inside the module to mitigate the false triggering. For modules A, B, and C, cross(talk-induced) turn-on are noticed internally even though terminal waveforms look normal. Module C switches with severe current unbalance and cross-turn-on because of asymmetry in the layout of its power loop. Module D's symmetrical layout suppresses current unbalance and cross-turn-on at the expense of switching energy, which is the largest among the modules.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"36 1","pages":"306-311"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Package influence on the simulated performance of 1.2 kV SiC modules\",\"authors\":\"Zichen Miao, Yincan Mao, K. Ngo, Woochan Kim\",\"doi\":\"10.1109/WIPDA.2015.7369301\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Power modules with well-behaved terminal waveforms could still have their dice suffering from false triggering. Immunities to false triggering and current unbalance, and switching energy of four commercial 1.2 kV SiC modules (modules A, B, C, and D) are compared by studying the simulated channel current of each MOSFET die in the presence of packages' parasitic impedances. For module B, gate inductance and Kelvin-source inductance of the low-side switch reaches 111 nH and 103 nH, respectively, and 15 Ω gate resistor is added inside the module to mitigate the false triggering. For modules A, B, and C, cross(talk-induced) turn-on are noticed internally even though terminal waveforms look normal. Module C switches with severe current unbalance and cross-turn-on because of asymmetry in the layout of its power loop. Module D's symmetrical layout suppresses current unbalance and cross-turn-on at the expense of switching energy, which is the largest among the modules.\",\"PeriodicalId\":6538,\"journal\":{\"name\":\"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)\",\"volume\":\"36 1\",\"pages\":\"306-311\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WIPDA.2015.7369301\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WIPDA.2015.7369301","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Package influence on the simulated performance of 1.2 kV SiC modules
Power modules with well-behaved terminal waveforms could still have their dice suffering from false triggering. Immunities to false triggering and current unbalance, and switching energy of four commercial 1.2 kV SiC modules (modules A, B, C, and D) are compared by studying the simulated channel current of each MOSFET die in the presence of packages' parasitic impedances. For module B, gate inductance and Kelvin-source inductance of the low-side switch reaches 111 nH and 103 nH, respectively, and 15 Ω gate resistor is added inside the module to mitigate the false triggering. For modules A, B, and C, cross(talk-induced) turn-on are noticed internally even though terminal waveforms look normal. Module C switches with severe current unbalance and cross-turn-on because of asymmetry in the layout of its power loop. Module D's symmetrical layout suppresses current unbalance and cross-turn-on at the expense of switching energy, which is the largest among the modules.