M. Simmons, F. Rueß, W. Pok, D. Thompson, M. Fuchsle, Giordano Scappucci, T. Reusch, K. Goh, S. R. Schofield, B. Weber, L. Oberbeck, A. Hamilton, F. Ratto
{"title":"原子精密硅器件制造","authors":"M. Simmons, F. Rueß, W. Pok, D. Thompson, M. Fuchsle, Giordano Scappucci, T. Reusch, K. Goh, S. R. Schofield, B. Weber, L. Oberbeck, A. Hamilton, F. Ratto","doi":"10.1109/NANO.2007.4601329","DOIUrl":null,"url":null,"abstract":"An important driving force behind the microelectronics industry is the ability to pack ever more features onto a silicon chip, by continually miniaturising the individual components. However, after 2015 there is no known technological route to reduce devices below 10 nm. We demonstrate a complete fabrication strategy towards atomic-scale device fabrication in silicon using phosphorus as a dopant in combination with scanning probe lithography and high purity, low temperature crystal growth. A major advantage of this strategy is the ability to investigate the role of dopant placement and atomically controlled growth on electronic device operation.","PeriodicalId":6415,"journal":{"name":"2007 7th IEEE Conference on Nanotechnology (IEEE NANO)","volume":"os-16 1","pages":"903-906"},"PeriodicalIF":0.0000,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Atomically precise silicon device fabrication\",\"authors\":\"M. Simmons, F. Rueß, W. Pok, D. Thompson, M. Fuchsle, Giordano Scappucci, T. Reusch, K. Goh, S. R. Schofield, B. Weber, L. Oberbeck, A. Hamilton, F. Ratto\",\"doi\":\"10.1109/NANO.2007.4601329\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An important driving force behind the microelectronics industry is the ability to pack ever more features onto a silicon chip, by continually miniaturising the individual components. However, after 2015 there is no known technological route to reduce devices below 10 nm. We demonstrate a complete fabrication strategy towards atomic-scale device fabrication in silicon using phosphorus as a dopant in combination with scanning probe lithography and high purity, low temperature crystal growth. A major advantage of this strategy is the ability to investigate the role of dopant placement and atomically controlled growth on electronic device operation.\",\"PeriodicalId\":6415,\"journal\":{\"name\":\"2007 7th IEEE Conference on Nanotechnology (IEEE NANO)\",\"volume\":\"os-16 1\",\"pages\":\"903-906\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 7th IEEE Conference on Nanotechnology (IEEE NANO)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NANO.2007.4601329\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 7th IEEE Conference on Nanotechnology (IEEE NANO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2007.4601329","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An important driving force behind the microelectronics industry is the ability to pack ever more features onto a silicon chip, by continually miniaturising the individual components. However, after 2015 there is no known technological route to reduce devices below 10 nm. We demonstrate a complete fabrication strategy towards atomic-scale device fabrication in silicon using phosphorus as a dopant in combination with scanning probe lithography and high purity, low temperature crystal growth. A major advantage of this strategy is the ability to investigate the role of dopant placement and atomically controlled growth on electronic device operation.