28nm高k金属门SRAM，具有异步交叉偶读辅助(AC2RA)电路，可将单端阵列的速度变化降低3倍

2012 Symposium on VLSI Circuits (VLSIC) Pub Date : 2012-06-13 DOI:10.1109/VLSIC.2012.6243791

Robin Lee, Jung-Ping Yang, Chia-En Huang, Chih-Chieh Chiu, Wei-Shuo Kao, Hong-Chen Cheng, H. Liao, Jonathan Chang

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引用次数: 3

摘要

为减少28nm HKMG工艺的速度变化，设计了单端异步交叉偶读辅助(AC2RA)电路方案。它使SRAM阵列的速度变化提高了63.3%，足以覆盖6σ的变化。更快的传感也提高了访问时间。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 28nm high-k metal-gate SRAM with Asynchronous Cross-Couple Read Assist (AC2RA) circuitry achieving 3x reduction on speed variation for single ended arrays

Asynchronous Cross-Couple Read Assist (AC2RA) circuitry scheme was invented for single-ended sensing to minimize speed variation in 28nm HKMG process. It improves SRAM array speed variation by 63.3% which is adequate to cover 6σ variation. Access time is also boosted by faster sensing.

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2012 Symposium on VLSI Circuits (VLSIC)

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