非易失性电阻交叉栅阵列的混合写偏置方案

A. Ciprut, E. Friedman
{"title":"非易失性电阻交叉栅阵列的混合写偏置方案","authors":"A. Ciprut, E. Friedman","doi":"10.1109/ISCAS.2018.8350906","DOIUrl":null,"url":null,"abstract":"Crossbar arrays based on non-volatile resistive devices are planned for future memory systems due to the scalability and performance as compared to conventional charge based memory systems. To enhance the feasibility of these resistive memory systems, the energy consumption needs to be reduced. The write operation of a resistive memory based on a one-selector-one-resistor crossbar array consumes significant energy. The energy consumed by a crossbar array is dependent on the device and interconnect characteristics as well as the bias scheme. While the device and circuit parameters are the same for a specific application, the bias scheme of an array can be tuned to improve the energy efficiency. In this paper, an intelligent write scheme is proposed to provide a hybrid bias scheme. The proposed system adaptively sets the bias schemes to enhance energy efficiency. The most energy efficient bias scheme depends upon several parameters such as the size of the array, nonlinearity factor, and number of selected cells. For a specific array size and device characteristics, a power delivery system is described that sets the bias voltages based on the number of selected cells. Energy improvements of more than 2× are demonstrated with this hybrid bias scheme.","PeriodicalId":6569,"journal":{"name":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"2020 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Hybrid Write Bias Scheme for Non-Volatile Resistive Crossbar Arrays\",\"authors\":\"A. Ciprut, E. Friedman\",\"doi\":\"10.1109/ISCAS.2018.8350906\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Crossbar arrays based on non-volatile resistive devices are planned for future memory systems due to the scalability and performance as compared to conventional charge based memory systems. To enhance the feasibility of these resistive memory systems, the energy consumption needs to be reduced. The write operation of a resistive memory based on a one-selector-one-resistor crossbar array consumes significant energy. The energy consumed by a crossbar array is dependent on the device and interconnect characteristics as well as the bias scheme. While the device and circuit parameters are the same for a specific application, the bias scheme of an array can be tuned to improve the energy efficiency. In this paper, an intelligent write scheme is proposed to provide a hybrid bias scheme. The proposed system adaptively sets the bias schemes to enhance energy efficiency. The most energy efficient bias scheme depends upon several parameters such as the size of the array, nonlinearity factor, and number of selected cells. For a specific array size and device characteristics, a power delivery system is described that sets the bias voltages based on the number of selected cells. Energy improvements of more than 2× are demonstrated with this hybrid bias scheme.\",\"PeriodicalId\":6569,\"journal\":{\"name\":\"2018 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"volume\":\"2020 1\",\"pages\":\"1-5\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-05-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Symposium on Circuits and Systems (ISCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2018.8350906\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2018.8350906","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

与传统的基于电荷的存储系统相比,由于可扩展性和性能,基于非易失性电阻器件的交叉棒阵列计划用于未来的存储系统。为了提高这些阻性存储系统的可行性,需要降低能耗。基于一个选择器-一个电阻交叉条阵列的电阻存储器的写操作消耗大量的能量。横杆阵列所消耗的能量取决于器件和互连特性以及偏置方案。虽然器件和电路参数对于特定应用是相同的,但可以调整阵列的偏置方案以提高能效。本文提出了一种智能写入方案来提供混合偏置方案。该系统自适应设置偏置方案以提高能效。最节能的偏置方案取决于几个参数,如阵列的大小、非线性因素和所选单元的数量。对于特定的阵列尺寸和器件特性,描述了一种基于所选单元的数量设置偏置电压的电力输送系统。该混合偏压方案可使能量提高2倍以上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Hybrid Write Bias Scheme for Non-Volatile Resistive Crossbar Arrays
Crossbar arrays based on non-volatile resistive devices are planned for future memory systems due to the scalability and performance as compared to conventional charge based memory systems. To enhance the feasibility of these resistive memory systems, the energy consumption needs to be reduced. The write operation of a resistive memory based on a one-selector-one-resistor crossbar array consumes significant energy. The energy consumed by a crossbar array is dependent on the device and interconnect characteristics as well as the bias scheme. While the device and circuit parameters are the same for a specific application, the bias scheme of an array can be tuned to improve the energy efficiency. In this paper, an intelligent write scheme is proposed to provide a hybrid bias scheme. The proposed system adaptively sets the bias schemes to enhance energy efficiency. The most energy efficient bias scheme depends upon several parameters such as the size of the array, nonlinearity factor, and number of selected cells. For a specific array size and device characteristics, a power delivery system is described that sets the bias voltages based on the number of selected cells. Energy improvements of more than 2× are demonstrated with this hybrid bias scheme.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Ultra-Low Power Wide-Dynamic-Range Universal Interface for Capacitive and Resistive Sensors An Energy-Efficient 13-bit Zero-Crossing ΔΣ Capacitance-to-Digital Converter with 1 pF-to-10 nF Sensing Range Power Optimized Comparator Selecting Method For Stochastic ADC Brain-inspired recurrent neural network with plastic RRAM synapses On the Use of Approximate Multipliers in LMS Adaptive Filters
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1