一个2.98nW带隙基准电压，采用自调谐低漏采样和保持器

2012 Symposium on VLSI Circuits (VLSIC) Pub Date : 2012-06-13 DOI:10.1109/VLSIC.2012.6243859

Yen-Po Chen, Matthew R. Fojtik, D. Blaauw, D. Sylvester

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引用次数: 31

摘要

提出了一种新型的低功耗带隙基准电压，采用自校准占空比和漏损补偿的采样保持电路。0.18μm CMOS测试芯片的温度系数为24.7ppm/°C，功耗为2.98nW，与之前的最低功耗带隙基准相比，功耗降低了251倍。

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A 2.98nW bandgap voltage reference using a self-tuning low leakage sample and hold

A novel low power bandgap voltage reference using a sample and hold circuit with self-calibrating duty cycle and leakage compensation is presented. Measurements of 0.18μm CMOS test chips show a temperature coefficient of 24.7ppm/°C and power consumption of 2.98nW, marking a 251× power reduction over the previous lowest power bandgap reference.

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2012 Symposium on VLSI Circuits (VLSIC)

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