{"title":"时间触发式以太网高精度时钟同步的晶振频率补偿技术","authors":"Haiying Yuan, Kai Zhang, Tong Zheng, Yichen Wang","doi":"10.1109/CSTIC49141.2020.9282586","DOIUrl":null,"url":null,"abstract":"Temperature change, aging and voltage fluctuation also cause clock deviation of the crystal oscillator frequency, which makes a great impact on the real-time communication and network stability in the distributed control system. While local clock value is periodically corrected based on SAE AS6802 clock synchronization protocol in Time- Triggered Ethernet, but a large cumulative error occurs to the calibration cycle, which reduces the clock synchronization accuracy. According to the severe influence of temperature on crystal oscillator frequency, a digital frequency calibration circuit is designed in Local_clock module ofTTEthernet nodes, and it is modeled based on the frequency error Look-Up table generated by Temperature-Frequency characteristics. The maximum clock deviation between network nodes was analyzed to verify the synchronization performance of the TTEthernet. Numerous experimental results show that proposed digital frequency calibration scheme achieves high clock synchronization accuracy.","PeriodicalId":6848,"journal":{"name":"2020 China Semiconductor Technology International Conference (CSTIC)","volume":"09 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Crystal Oscillator Frequency compensation technology of High Precision Clock Synchronization for Time-triggered Ethernet\",\"authors\":\"Haiying Yuan, Kai Zhang, Tong Zheng, Yichen Wang\",\"doi\":\"10.1109/CSTIC49141.2020.9282586\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Temperature change, aging and voltage fluctuation also cause clock deviation of the crystal oscillator frequency, which makes a great impact on the real-time communication and network stability in the distributed control system. While local clock value is periodically corrected based on SAE AS6802 clock synchronization protocol in Time- Triggered Ethernet, but a large cumulative error occurs to the calibration cycle, which reduces the clock synchronization accuracy. According to the severe influence of temperature on crystal oscillator frequency, a digital frequency calibration circuit is designed in Local_clock module ofTTEthernet nodes, and it is modeled based on the frequency error Look-Up table generated by Temperature-Frequency characteristics. The maximum clock deviation between network nodes was analyzed to verify the synchronization performance of the TTEthernet. Numerous experimental results show that proposed digital frequency calibration scheme achieves high clock synchronization accuracy.\",\"PeriodicalId\":6848,\"journal\":{\"name\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"volume\":\"09 1\",\"pages\":\"1-3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 China Semiconductor Technology International Conference (CSTIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC49141.2020.9282586\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 China Semiconductor Technology International Conference (CSTIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC49141.2020.9282586","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Crystal Oscillator Frequency compensation technology of High Precision Clock Synchronization for Time-triggered Ethernet
Temperature change, aging and voltage fluctuation also cause clock deviation of the crystal oscillator frequency, which makes a great impact on the real-time communication and network stability in the distributed control system. While local clock value is periodically corrected based on SAE AS6802 clock synchronization protocol in Time- Triggered Ethernet, but a large cumulative error occurs to the calibration cycle, which reduces the clock synchronization accuracy. According to the severe influence of temperature on crystal oscillator frequency, a digital frequency calibration circuit is designed in Local_clock module ofTTEthernet nodes, and it is modeled based on the frequency error Look-Up table generated by Temperature-Frequency characteristics. The maximum clock deviation between network nodes was analyzed to verify the synchronization performance of the TTEthernet. Numerous experimental results show that proposed digital frequency calibration scheme achieves high clock synchronization accuracy.