应用于高寿命要求的原生氮化镓衬底金属绝缘体半导体电容器的栅极工程

Kevin Dannecker, J. Baringhaus
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引用次数: 1

摘要

平面金属绝缘体半导体电容器是在原生氮化镓衬底上制造的,具有不同的栅极介质,即二氧化硅,氮化硅和氧化铝。测量泄漏电流以确定其对电气击穿的稳健性。对不同栅极介质、衬底和外延表面的磁滞效应进行了评价。将采用多晶硅栅极触点的栅极优先工艺与采用溅射铝栅极的栅极后工艺进行了比较。前者具有优异的抗击穿性能,介电击穿场强约为9 MV/cm,且在250 ~ 450 K范围内与温度无关。此外,通过应力/恢复栅极电流瞬态测量来估计栅极氧化物陷阱,以确定高寿命要求的场强极限。根据各种测量结果,二氧化硅在击穿稳健性和迟滞效应方面成为最佳选择。为了避免介质层的短期和长期损伤,提出了3 ~ 4 MV/cm的介电场强度限值。
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Gate engineering in metal insulator semiconductor capacitors on native gallium nitride substrates for applications with high lifetime requirements
Planar metal-insulator-semiconductor capacitors are fabricated on native gallium nitride substrates with different gate dielectrics, namely, silicon dioxide, silicon nitride, and aluminum oxide. The leakage current was measured to determine their robustness regarding electrical breakdown. Hysteresis effects were evaluated for the different gate dielectrics and for the substrate and the epitaxial surface. A gate-first process with a gate contact made from poly-crystalline silicon was compared to a gate-last process with a sputtered aluminum gate. The former showed superior robustness against electrical breakdown with a dielectric breakdown field strength of ≈ 9 MV/cm, which was found to be mostly independent of temperature in the range of 250–450 K. Furthermore, gate oxide traps were estimated by means of stress/recovery gate current transient measurements to confirm field strength limits for high lifetime requirements. Based on the various measurements, silicon dioxide emerged as the best choice regarding breakdown robustness and hysteresis effects. A limit for the dielectric field strength of 3–4 MV/cm is proposed to avoid short- and long-term damage of the dielectric layer.
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