A. Ruospo, Angelo Balaara, A. Bosio, Ernesto Sánchez
{"title":"A Pipelined Multi-Level Fault Injector for Deep Neural Networks","authors":"A. Ruospo, Angelo Balaara, A. Bosio, Ernesto Sánchez","doi":"10.1109/DFT50435.2020.9250866","DOIUrl":null,"url":null,"abstract":"Applications leveraging on new computing paradigms, such as brain-inspired computing, are currently being exploited in many fields thanks to their outstanding performance in solving complex tasks. Among them, Deep Neural Networks (DNNs) are gaining growing interest in different research areas spanning from playing complex games to safety-critical applications such as automotive. In the latter case, reliability assumes a dominant role and efficient reliability assessment approaches are thus required. Several works evaluate the DNN reliability by running fault injection campaigns. However, due to the excessive time required to run a single DNN execution (i.e., inference) at Hardware Description Level (HDL), the injections are typically performed at software level. This is clearly important to provide an overall estimation of the DNN behavior in faulty scenarios, however, it might be not accurate enough if the reliability of the target HW architecture must be determined. In that case, you need to run the fault injections directly at a hardware description level. The intent of the paper is to present a pipelined multi-layer fault injector for Deep Neural Networks that is able to drastically reduce the fault simulation time at HDL. Mimicking the behavior of the pipeline of a processor core, it allows to drastically reduce the complete fault injection time to be run at hardware level, thereby reducing the required time by about 60%.","PeriodicalId":340119,"journal":{"name":"2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","volume":"46 11","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT50435.2020.9250866","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
Applications leveraging on new computing paradigms, such as brain-inspired computing, are currently being exploited in many fields thanks to their outstanding performance in solving complex tasks. Among them, Deep Neural Networks (DNNs) are gaining growing interest in different research areas spanning from playing complex games to safety-critical applications such as automotive. In the latter case, reliability assumes a dominant role and efficient reliability assessment approaches are thus required. Several works evaluate the DNN reliability by running fault injection campaigns. However, due to the excessive time required to run a single DNN execution (i.e., inference) at Hardware Description Level (HDL), the injections are typically performed at software level. This is clearly important to provide an overall estimation of the DNN behavior in faulty scenarios, however, it might be not accurate enough if the reliability of the target HW architecture must be determined. In that case, you need to run the fault injections directly at a hardware description level. The intent of the paper is to present a pipelined multi-layer fault injector for Deep Neural Networks that is able to drastically reduce the fault simulation time at HDL. Mimicking the behavior of the pipeline of a processor core, it allows to drastically reduce the complete fault injection time to be run at hardware level, thereby reducing the required time by about 60%.