{"title":"Design of 1.55 NEF, 2µA, Chopper Based Amplifier in 40nm CMOS for Biomedical Multichannel Integrated System","authors":"Pawel Wargacki, P. Kmon","doi":"10.23919/mixdes55591.2022.9837969","DOIUrl":null,"url":null,"abstract":"We present a design of a low-noise chopper based amplifier for biomedical recordings. It is a part of a multi-channel integrated system fabricated in 40nm CMOS technology. It features a DC stabilizing loop for compensating electrode offset and positive feedback for input impedance boosting. The first stage uses double current reuse. Design consumes 2µA per channel under 1V supply voltage and occupies only 0.044mm2 of silicon area. A novel input stage presented in this work combines a low noise performance of a stacked input pair with the high DC gain of the folded cascode amplifier. The simulated input-referred noise is 0.96/µVrms in the 0.5-100Hz frequency band and 2.8µVrms in the 100Hz-10kHz frequency band, respectively, leading to a noise-efficiency factor of 5.29 (0.5-100Hz) and 1.55 (0.1-10kHz).","PeriodicalId":356244,"journal":{"name":"2022 29th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","volume":"58 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 29th International Conference on Mixed Design of Integrated Circuits and System (MIXDES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/mixdes55591.2022.9837969","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We present a design of a low-noise chopper based amplifier for biomedical recordings. It is a part of a multi-channel integrated system fabricated in 40nm CMOS technology. It features a DC stabilizing loop for compensating electrode offset and positive feedback for input impedance boosting. The first stage uses double current reuse. Design consumes 2µA per channel under 1V supply voltage and occupies only 0.044mm2 of silicon area. A novel input stage presented in this work combines a low noise performance of a stacked input pair with the high DC gain of the folded cascode amplifier. The simulated input-referred noise is 0.96/µVrms in the 0.5-100Hz frequency band and 2.8µVrms in the 100Hz-10kHz frequency band, respectively, leading to a noise-efficiency factor of 5.29 (0.5-100Hz) and 1.55 (0.1-10kHz).
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