Hot carrier effects on CMOS circuit performance

1989 Proceedings of the IEEE Custom Integrated Circuits Conference Pub Date : 1989-05-15 DOI:10.1109/CICC.1989.56839

M. Cirit

引用次数: 1

Abstract

A description is given of a hot-electron-effect analyzer incorporated into a critical path analysis tool, Ltime, for CMOS circuits. Using some empirical relationships, the author correlates the accumulated charge in the oxide to the size and capacitive load of the individual transistors. Effective stress time is calculated, using the time spent in the saturation region of each transistor, the results of a static switching probability analyzer, and the clock period. The methods developed can be used to predict circuit performance variation due to hot carriers as a function of time

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热载子效应对CMOS电路性能的影响

描述了一个热电子效应分析仪集成到一个关键路径分析工具，Ltime，用于CMOS电路。利用一些经验关系，作者将氧化物中的累积电荷与单个晶体管的尺寸和容性负载联系起来。利用在每个晶体管的饱和区所花费的时间、静态开关概率分析仪的结果和时钟周期来计算有效应力时间。所开发的方法可用于预测由于热载流子随时间的变化而引起的电路性能变化

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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1989 Proceedings of the IEEE Custom Integrated Circuits Conference

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