A 60-GHz CMOS Balanced Power Amplifier with Miniaturized Quadrature Hybrids Achieving 19.0-dBm Output Power and 24.4% Peak PAE

Abstract

In this paper, a 60-GHz CMOS balanced power amplifier (PA) is proposed. Two miniaturized quadrature hybrids are utilized to realize power splitting and power combining. The compact hybrids can achieve good input and output matching performances. Transistor-layout optimization is taken into consideration to boost the output power and improve the power-added efficiency (PAE). The balanced PA is designed in 65-nm bulk CMOS and all the electromagnetic (EM) simulations of passive devices are executed in the EM tool. Post-layout simulation results show that the proposed balanced PA realizes a small-signal gain of 29.1 dB at 60 GHz with an 11-GHz bandwidth. With a 1.2-V supply voltage and 300-mW power consumption, the balanced PA achieves a saturated output power of 19.0 dBm and 24.4% peak PAE at 60 GHz, which is suitable for 60-GHz wireless systems.