E. I. Cole, P. Tangyunyong, C. Hawkins, M. Bruce, V. Bruce, R. Ring, W.-L. Chong
{"title":"Resistive interconnection localization","authors":"E. I. Cole, P. Tangyunyong, C. Hawkins, M. Bruce, V. Bruce, R. Ring, W.-L. Chong","doi":"10.1109/IPFA.2002.1025604","DOIUrl":null,"url":null,"abstract":"Resistive interconnection localization (RIL) is a new scanning laser microscope analysis technique that directly and rapidly localizes defective IC vias, contacts, and conductors from the front side and backside. RIL uses a scanned laser to produce localized thermal gradients in IC interconnections during functional testing. A change in the pass/fail state with localized heating of the IC identifies the failing site. The technique reduces the time to locate a resistive via from months to minutes. The sources of defective vias, the physics of RIL signal generation, and examples of RIL analysis are presented.","PeriodicalId":328714,"journal":{"name":"Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"43","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2002.1025604","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 43
Abstract
Resistive interconnection localization (RIL) is a new scanning laser microscope analysis technique that directly and rapidly localizes defective IC vias, contacts, and conductors from the front side and backside. RIL uses a scanned laser to produce localized thermal gradients in IC interconnections during functional testing. A change in the pass/fail state with localized heating of the IC identifies the failing site. The technique reduces the time to locate a resistive via from months to minutes. The sources of defective vias, the physics of RIL signal generation, and examples of RIL analysis are presented.
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