CAD tool for PLL Design

14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems Pub Date : 2011-04-13 DOI:10.1109/DDECS.2011.5783095

Krzysztof Siwiec, T. Borejko, W. Pleskacz

引用次数: 7

Abstract

In this paper PLL Design tool, created in Matlab from MathWorks, has been presented. The tool allows to analyze loop stability and phase noise of PLL, based on phase-locked loop linear model. Fast evaluation of loop filter components values for popular passive and active filters is possible. The created tool allows to analyze PLL parameters, like loop filter components values, VCO gain and charge pump current variations impact on loop stability and phase-noise. Algorithm for phase-noise calculation, based on transient PLL simulation, has also been implemented. Thanks to these features the created tool is a valuable aid for PLL designer on all design steps.

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

锁相环设计CAD工具

本文介绍了利用MathWorks在Matlab中创建的锁相环设计工具。该工具可以基于锁相环线性模型分析锁相环的环稳定性和相位噪声。对于流行的无源和有源滤波器，环路滤波器元件值的快速评估是可能的。该工具可以分析锁相环参数，如环路滤波器元件值、压控振荡器增益和电荷泵电流变化对环路稳定性和相位噪声的影响。基于暂态锁相环仿真的相位噪声计算算法也已实现。由于这些功能，创建的工具是锁相环设计人员在所有设计步骤中的宝贵帮助。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文去求助

来源期刊

14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems

自引率

0.00%

发文量

期刊最新文献

Behavioral model of TRNG based on oscillator rings implemented in FPGA CAD tool for PLL Design High-performance hardware accelerators for sorting and managing priorities Defect-oriented module-level fault diagnosis in digital circuits Design-for-Test method for high-speed ADCs: Behavioral description and optimization