{"title":"Automated CAE tools for full custom design of bipolar analog ASICs","authors":"M. Chian, K.S. Eshbaugh, L. Sanders","doi":"10.1109/ASIC.1990.186165","DOIUrl":null,"url":null,"abstract":"CAE tools for use in design of bipolar analog ICS with the analog FASTRACK design system are discussed. Two tools, device design and autogen, automatically design and lay out a full-custom transistor. The statistical analysis and modeling (SAM) tool is used to generate model parameter values for a variety of deterministic and statistical simulation modes. A tool for automated synthesis of IC macromodels (ASIM) is provided to create macro/behavioral models of analog and digital blocks for up to 100 times faster circuit-level simulation.<<ETX>>","PeriodicalId":126693,"journal":{"name":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1990.186165","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
CAE tools for use in design of bipolar analog ICS with the analog FASTRACK design system are discussed. Two tools, device design and autogen, automatically design and lay out a full-custom transistor. The statistical analysis and modeling (SAM) tool is used to generate model parameter values for a variety of deterministic and statistical simulation modes. A tool for automated synthesis of IC macromodels (ASIM) is provided to create macro/behavioral models of analog and digital blocks for up to 100 times faster circuit-level simulation.<>
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