An innovative FPGA-based ADC/DAC design using 1-bit adaptive-delta modulation

S. Akash, Dey Sayantan, S. Iti
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Abstract

The Analog-to-Digital Converter (ADC), with its wide variety of applications in the electronics and communication domains, is the most crucial unit in every digital gadget. This paper discusses a smart way of converting an input analog signal to its digital counterpart using an innovative Adaptive-Delta modulator, followed by a signal reconstruction process to retrieve the original message. It has done the design in Matrix Laboratory (MATLAB) Simulink, and the hardware implementation is tested on the Xilinx Spartan-6 LX45 FPGA core. This design aims for high-accuracy conversion and optimization of hardware resources. The 1-bit adaptive model is superior in comparison to the traditional delta modulation (DM) scheme while tracking stiff analog input signals, producing a much lower mean square error. The implementation is quite simple as it uses the transmission of 1-bit digital data at a time. On the receiver side, digital-toanalog conversion (DAC) makes use of the same adaptive logic in reconstructing the original input signal. The designed prototype demonstrates its resistance to a wide range of input amplitude and frequency variations. The ADC-DAC design method in this paper is accurate, makes the best use of resources, and is easy to use.
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一种创新的基于fpga的ADC/DAC设计,采用1位自适应增量调制
模数转换器(ADC)在电子和通信领域有着广泛的应用,是每个数字设备中最关键的单元。本文讨论了一种使用创新的自适应增量调制器将输入模拟信号转换为其数字对应物的智能方法,然后进行信号重建过程以检索原始消息。在矩阵实验室(MATLAB) Simulink中进行了设计,并在Xilinx Spartan-6 LX45 FPGA内核上进行了硬件实现测试。本设计旨在实现硬件资源的高精度转换和优化。在跟踪僵硬的模拟输入信号时,1位自适应模型比传统的增量调制(DM)方案优越,产生更低的均方误差。实现非常简单,因为它每次使用1位数字数据的传输。在接收端,数模转换(DAC)利用相同的自适应逻辑重构原始输入信号。设计的样机证明了它能抵抗大范围的输入幅度和频率变化。本文提出的ADC-DAC设计方法准确,充分利用资源,使用方便。
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