R. V. Burress, M. Capote, Yong-Joon Lee, H.A. Lenos, J.F. Zamora
{"title":"A novel, wafer-scale technology for addressing process and cost obstacles associated with underfilling FCOB","authors":"R. V. Burress, M. Capote, Yong-Joon Lee, H.A. Lenos, J.F. Zamora","doi":"10.1109/ECTC.2002.1008125","DOIUrl":null,"url":null,"abstract":"This paper provides an update on development work underway to produce a novel wafer-scale packaging technology. The technology, referred to as multi-layer, wafer-scale encapsulation (MLWSE), relies on high performance polymers which are used in wafer-level encapsulation and subsequent electronic assembly processes. High-speed laser processing, which is used to produce the interconnection structure, is another integral aspect of this technology. We will describe the basic elements of the technology and present the current state of development with data from test assemblies. Also to be discussed are the potential technological/assembly benefits offered by the MLWSE technology and a summary of the results of a cost analysis comparing this technology to other HDI technologies.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2002.1008125","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper provides an update on development work underway to produce a novel wafer-scale packaging technology. The technology, referred to as multi-layer, wafer-scale encapsulation (MLWSE), relies on high performance polymers which are used in wafer-level encapsulation and subsequent electronic assembly processes. High-speed laser processing, which is used to produce the interconnection structure, is another integral aspect of this technology. We will describe the basic elements of the technology and present the current state of development with data from test assemblies. Also to be discussed are the potential technological/assembly benefits offered by the MLWSE technology and a summary of the results of a cost analysis comparing this technology to other HDI technologies.
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