Performance analysis of a 10-Gbit/s digital switch on MCM

C. Truzzi, E. Beyne, E. Ringoot
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引用次数: 3

Abstract

The paper describes a test device realised as an MCM including four identical unencapsulated ASICs mounted on a 5-layer thin-film substrate. The MCM is a 12.8 Gbit/sec data switch and it has been designed with the purpose of performance evaluation of the module interconnection technology. A validation methodology has been developed to highlight the effect of variables such as line properties, switching noise, crosstalk and buffer topologies on the signal integrity. This approach has been used to characterise the transmission rate of the digital switch and to evaluate the system performance of the interconnection technology.
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MCM上10gbit /s数字开关性能分析
本文描述了一种测试装置,实现为MCM,包括四个相同的未封装asic,安装在5层薄膜衬底上。MCM是一个12.8 Gbit/sec的数据交换机,其设计目的是为了对模块互连技术进行性能评估。已经开发了一种验证方法来突出变量的影响,如线路属性,开关噪声,串扰和缓冲拓扑对信号完整性的影响。该方法已被用于表征数字交换机的传输速率和评估互连技术的系统性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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A programmable processing element dedicated as building block for a large area integrated multiprocessor system Tactile integrated circuit sensor realized with a piezoelectric polymer Survey of low power techniques for VLSI design Performance analysis of a 10-Gbit/s digital switch on MCM Tradeoffs in chip and substrate complexity and cost for field programmable multichip modules
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