FzCRITIC-a functional timing verifier using a novel fuzzy delay model

Abstract

Chip performance and density are increasing tremendously and the CAD tools are always lagging behind. In this paper, we introduce a functional timing verifier using a novel fuzzy delay model which bridges the gap between the front-end timing verification and the back-end delay fault testing. The proposed fuzzy delay model can handle uncertainties with respect to timing characteristics, and manufacturing anomalies. Experimental results are presented for the ISCAS-85 benchmark circuits.