A 42 GHz Amplifier Designed Using Common-Gate Load Pull

S. Mahon
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引用次数: 3

Abstract

A new technique is proposed for the design of linear and power amplifiers at mm-wave frequencies where load-pull of large transistor output cells is difficult. The technique transforms the load-pull data on a small, standard foundry transistor layout to a pair of common-gate contours for the intrinsic device; one gate-source and one gate-drain. These are then recombined as an intrinsic drain-source contour for a larger and arbitrary transistor layout. A driver amplifier for the ETSI 42 GHz point-to-point radio band has been designed using the proposed technique. The fabricated MMIC consumes 1.5 watts and has a gain of 25 dB, and OIP3 of 36 dBm, OIP5 of 28 dBm and P1dB of 23 dBm which is believed to be the best reported result to date.
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用共门负载拉设计的42 GHz放大器
提出了一种设计毫米波频率线性放大器和功率放大器的新技术,该技术适用于大型晶体管输出单元的负载-拉动式设计。该技术将小型标准铸造晶体管布局上的负载-拉力数据转换为本征器件的一对共栅极轮廓;一个栅极源和一个栅极漏。然后将它们重新组合为更大的任意晶体管布局的本禀漏源轮廓。利用所提出的技术设计了一个用于ETSI 42 GHz点对点无线电频段的驱动放大器。制作的MMIC功耗为1.5瓦,增益为25 dB, OIP3为36 dBm, OIP5为28 dBm, P1dB为23 dBm,这被认为是迄今为止报道的最佳结果。
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