On-Chip Digital Calibration for Analog ICs Towards Improved Reliability in Nanotechnologies

Abstract

In this paper, we propose a digital method of calibration for analog integrated circuits (IC) as a mean to extend the lifetime of ICs and maintain their reliability. The proposed method can compensate partial drift in electrical parameters of circuits, which occurs either in a long-term view due to ageing and electrical stress or is rather more acute, being caused by process, voltage and temperature fluctuations. The digital calibration approach was utilized in an integrated variable-gain amplifier (VGA). Calibration is aimed at cancellation of the VGA input offset voltage. This technique does not require additional setting or test, and therefore, it can be fully autonomous. The whole system is implemented on a chip and it was fabricated in 130nm CMOS process. The power supply voltage of only 600 m V was used. The proposed self-calibrated system was verified through Monte Carlo, reliability and process corner analyses. After fabrication, prototyped chips were verified by experimental measurements over 10 packaged samples. Obtained results fit well between corners of simulation. In essential specifications such as voltage gain, the VGA closely meets the nominal values, which proves the effectiveness of the digital calibration. The measured calibrated VGA input offset voltage is in the range from 13 $\mu V$ to 167 $\mu V$, while the amplifier without calibration exhibits the input offset mean = 403 $\mu V$ and $\sigma=3.45mV$ (measured in different chip samples). The digital method of calibration serves as an alternative to other widely utilized methods such as chopper stabilization or auto-zero technique. Therefore, the chopper stabilization was developed for the same VGA in order to consistently compare both methods.