A High-Time-Resolution Time-to-Digital Converter Using Coupled Ring Oscillator with Phase Averaging

Daiki Ogata, R. Kamiya, Yusuke Toyoshima, K. Ohhata
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Abstract

This paper proposes a high-time-resolution time to digital converter (TDC) using a coupled ring oscillator (CRO) with phase averaging. The CRO can generate short time interval multiphase clocks, and combining it with a counter enables a high-time-resolution TDC with a wide input range and relatively small circuitry. In addition, the application of phase averaging to the CRO reduces the timing error due to mismatch. A novel sampling technique is also proposed to eliminate the sampling error due to counter delay and glitches. Post-layout simulations were performed on a 10-bit TDC in 28-nm CMOS technology to evaluate the performance of the proposed TDC. The results showed that the high time resolution of 2.5 ps and low power dissipation of 15.6 m W at the sampling frequency of 350 MHz could be obtained, along with the FOM of 0.083 pJ/conv.-step.
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采用相位平均耦合环振荡器的高时间分辨率时数转换器
本文提出了一种采用相位平均耦合环振荡器的高时间分辨率时数转换器(TDC)。CRO可以产生短时间间隔多相时钟,并与计数器相结合,使其具有宽输入范围和相对较小的电路的高时间分辨率TDC。此外,将相位平均应用于CRO,减小了由于失配引起的时序误差。提出了一种新的采样技术,以消除由于计数器延迟和小故障引起的采样误差。在28纳米CMOS技术的10位TDC上进行了布局后仿真,以评估所提出的TDC的性能。结果表明,在350 MHz的采样频率下,可获得2.5 ps的高时间分辨率和15.6 m W的低功耗,FOM为0.083 pJ/con .-step。
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