{"title":"Residue arithmetic multiplier based on the radix-4 signed-digit multiple-valued arithmetic circuits","authors":"Shugang Wei, K. Shimizu","doi":"10.1109/ICVD.1999.745150","DOIUrl":null,"url":null,"abstract":"Residue arithmetic multiplier based on the radix-4 signed-digit arithmetic is presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, two radix-4 signed-digit (SD) number representations, (-2,-1,0,1,2) and (-3,-2,-1,0,1,2,3), are introduced. The former is used for the input and output, and the latter for the inner arithmetic circuit of the presented multiplier. So that, by using integers 4/sup P/ and 4/sup P//spl plusmn/1 as moduli of residue number system (RNS), where p is a positive integer, both the partial product generating circuit and the circuit for sum of the partial products in the multiplier can be efficiently constructed based on the SD number representations. The module m addition, m=4/sup P/ or m=4/sup P//spl plusmn/1, can be performed by an SD adder or an end-around-carry SD adder with the multiple-valued circuits and the addition time is independent of the word length of operands. The modulo m multiplier can be compactly constructed using a binary modulo m SD adder tree based on the multiple-valued addition circuits, and consequently the module m multiplication is performed in O(log/sub 2/p) time.","PeriodicalId":443373,"journal":{"name":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVD.1999.745150","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
Residue arithmetic multiplier based on the radix-4 signed-digit arithmetic is presented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, two radix-4 signed-digit (SD) number representations, (-2,-1,0,1,2) and (-3,-2,-1,0,1,2,3), are introduced. The former is used for the input and output, and the latter for the inner arithmetic circuit of the presented multiplier. So that, by using integers 4/sup P/ and 4/sup P//spl plusmn/1 as moduli of residue number system (RNS), where p is a positive integer, both the partial product generating circuit and the circuit for sum of the partial products in the multiplier can be efficiently constructed based on the SD number representations. The module m addition, m=4/sup P/ or m=4/sup P//spl plusmn/1, can be performed by an SD adder or an end-around-carry SD adder with the multiple-valued circuits and the addition time is independent of the word length of operands. The modulo m multiplier can be compactly constructed using a binary modulo m SD adder tree based on the multiple-valued addition circuits, and consequently the module m multiplication is performed in O(log/sub 2/p) time.