Intel's Post Silicon functional validation approach

Tommy Bojan, I. Frumkin, R. Mauri
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引用次数: 5

Abstract

CPU Post-Silicon functional validation is the last "guardian" logic-wise before delivering the product to the market. In each CPU generation, the challenges are larger due to increasingly complex architectures, budget constraints and shorter schedules. Success can be achieved just with the novel approaches across different validation teams, and with a complex of state-of-the-art validation software, hardware, execution and silicon debug environments. Budget constraints lead to high automation and efficient validation process. Though Intel Corporation has different divisions, mutual help and hard work and optimization ensures high quality product within the schedule.
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英特尔的后硅功能验证方法
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Chairs' welcome message Leadership Microprocessors: Validation, debug and test Panel: Functional coverage - is your design exposed? Intel's Post Silicon functional validation approach
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