A 57.1–59GHz CMOS fractional-N frequency synthesizer using quantization noise shifting technique

Abstract

In this paper, a 57.1-59 GHz fractional-N frequency synthesizer has been fabricated in 90 nm CMOS technology. A magnetic-coupled VCO achieves the high oscillation frequency and low phase noise. A harmonic-locked PD and a multi-modulus prescaler are adopted to double the sampling frequency of a second-order delta-sigma modulator. Theoretically, the quantization noise is improved by 12 dB with the same PLL bandwidth. It consumes 89 mW from a 1.2 V analog supply with output buffers and 16 mW from a 1.2 V digital supply. The chip occupies 0.86 times1.28 mm2 and the measured phase noise at 58.359375 GHz with the offset frequency of 2 MHz is -95.1 dBc/Hz.