{"title":"A 0.2V 0.97nW 0.011mm2 Fully-Passive mHBC Tag Using Intermediate Interference Modulation in 65nm CMOS","authors":"A. Tanaka, Guowei Chen, Sitong Ye, K. Niitsu","doi":"10.1109/icecs53924.2021.9665542","DOIUrl":null,"url":null,"abstract":"A low-power and small-form-factor fully-passive magnetic human body communication (mHBC) tag in 65nm CMOS for low-cost biomedical IoT application is presented. By employing a newly proposed intermediate interference modulation technique, the full-passive mHBC scheme can emerge, which enables battery-less and low-power operation. The tag circuit with an NMOS-stacked LDO regulator, a differential ring oscillator, and a level shifter has also been proposed for further power reduction and footprint reduction. The prototype chip of 0.011mm2 was developed in 65nm standard CMOS. The measurement results showed successful operation with 0.97nW under 0.2V.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/icecs53924.2021.9665542","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A low-power and small-form-factor fully-passive magnetic human body communication (mHBC) tag in 65nm CMOS for low-cost biomedical IoT application is presented. By employing a newly proposed intermediate interference modulation technique, the full-passive mHBC scheme can emerge, which enables battery-less and low-power operation. The tag circuit with an NMOS-stacked LDO regulator, a differential ring oscillator, and a level shifter has also been proposed for further power reduction and footprint reduction. The prototype chip of 0.011mm2 was developed in 65nm standard CMOS. The measurement results showed successful operation with 0.97nW under 0.2V.
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