A normalization procedure of DC-side stray inductance for high-speed switching circuit

M. Ando, K. Wada
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引用次数: 2

Abstract

Recently, high-speed switching circuits using SiC and GaN power devices have been developed for realizing higher efficiency. Stray inductance caused by the wiring structure between a DC capacitor and power devices is one of the most critical parameters for these high-speed switching circuits. In this paper a DC-side stray inductance design procedure for a high-speed switching circuit is presented based on a normalization procedure. The stray inductance is presented not as the absolute value [H] but as the percent value [%] based on the power rating of the converter circuit. By applying the proposed method, the stray inductance can be designed for a circuit depending on the switching time and the voltage and current ratings. To verify the normalization method, experimental results are shown using an all-SiC module at voltage and current ratings of 500 V and 100 A, respectively.
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高速开关电路直流侧杂散电感的归一化方法
近年来,为了实现更高的效率,采用SiC和GaN功率器件的高速开关电路得到了发展。直流电容与电源器件之间的布线结构所引起的杂散电感是高速开关电路中最关键的参数之一。本文提出了一种基于归一化方法的高速开关电路直流侧杂散电感设计方法。杂散电感不是表示为绝对值[H],而是表示为基于变换器电路额定功率的百分比值[%]。应用该方法,可以根据开关时间和电压、电流额定值来设计电路的杂散电感。为了验证归一化方法,给出了使用全sic模块在额定电压为500v和额定电流为100a时的实验结果。
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