Evaluation of epi layer resistivity effects in mixed-signal submicron CMOS integrated circuits

V. Liberali
{"title":"Evaluation of epi layer resistivity effects in mixed-signal submicron CMOS integrated circuits","authors":"V. Liberali","doi":"10.1109/MIEL.2002.1003321","DOIUrl":null,"url":null,"abstract":"This paper illustrates a simple model for calculation and experimental evaluation of epi layer resistance. The model can be used during early stages of mixed-signal integrated circuit design, to estimate the effects of switching noise injection from digital cells to analog circuitry. Moreover, the proposed model leads to a simplified equivalent circuit that can be used for fast SPICE-level simulations of crosstalk effects.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":"771 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIEL.2002.1003321","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

This paper illustrates a simple model for calculation and experimental evaluation of epi layer resistance. The model can be used during early stages of mixed-signal integrated circuit design, to estimate the effects of switching noise injection from digital cells to analog circuitry. Moreover, the proposed model leads to a simplified equivalent circuit that can be used for fast SPICE-level simulations of crosstalk effects.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
混合信号亚微米CMOS集成电路中外延层电阻率效应的评价
本文给出了一个简单的外延层电阻计算和实验评估模型。该模型可用于混合信号集成电路设计的早期阶段,以估计从数字单元到模拟电路的开关噪声注入的影响。此外,所提出的模型导致一个简化的等效电路,可用于快速spice级串扰效应的模拟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Spontaneous recovery of positive gate bias stressed power VDMOSFETs Non-linear interaction of space charge waves in GaAs semiconductor Field effect transistors-from silicon MOSFETs to carbon nanotube FETs Silicon resonant cavity enhanced UV flame detector Evaluation of epi layer resistivity effects in mixed-signal submicron CMOS integrated circuits
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1