A Built-In Redundancy-Analysis Scheme for Self-Repairable RAMs with Two-Level Redundancy

2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2006-10-04 DOI:10.1109/DFT.2006.6

Yu-Jen Huang, D. Chang, Jin-Fu Li

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引用次数: 9

Abstract

With the increasing demand of memories in system-on-chip (SOC) designs, developing efficient yield-improvement techniques for memories becomes an important issue. Built-in self-repair (BISR) technique has become a popular method for repairing defective embedded memories. To allocate redundancy efficiently, built-in redundancy-analysis (BIRA) function is usually needed for designing a BISR scheme. This paper presents an efficient BIRA scheme for RAMs with two-level redundancy (i.e., spare rows, spare columns, and spare words). Experimental results show that the repair rate of the proposed BIRA scheme approximates to that of the exhaustive search with the same redundancy organization. Furthermore, the repair rate of the proposed BIRA scheme with two-level redundancy is higher than that of the exhaustive search scheme with one-level redundancy (i.e., spare rows and spare columns). The area cost of the proposed BIRA scheme is low. For example, the hardware overhead of the proposed BIRA scheme for an 8Ktimes64-bit RAM with three spare rows, three spare columns, and two spare words is only about 2%

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具有两级冗余的自修ram的内置冗余分析方案

随着片上系统(SOC)设计对存储器需求的增加，开发有效的存储器成品率提高技术成为一个重要问题。内置自我修复技术(BISR)已成为修复缺陷嵌入式存储器的常用方法。为了有效地分配冗余，在设计BISR方案时通常需要内置冗余分析(BIRA)功能。本文提出了一种有效的双冗余ram(即备用行、备用列和备用字)的BIRA方案。实验结果表明，在相同冗余组织下，所提BIRA方案的修复率接近穷举搜索的修复率。此外，两级冗余BIRA方案的修复率高于一级冗余(即备用行和备用列)的穷举搜索方案。拟议的BIRA方案的面积成本很低。例如，对于具有3行、3列和2个备用单词的8ktimes64位RAM，建议的BIRA方案的硬件开销仅为2%左右

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2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

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