{"title":"Innovative practices session 7C: Mixed signal test and debug","authors":"S. Natarajan","doi":"10.1109/VTS.2015.7116282","DOIUrl":null,"url":null,"abstract":"The traditional focus of work in test has been innovation and efficiency for high volume manufacturing test. However, in reality, a significant amount of effort is expended on design validation and debug prior to deeming analog and high speed serial IO test stimuli content production worthy. In this presentation we emphasize the importance of widening the post-silicon envelope to include early design validation and debug in addition to manufacturing test. The impact on DFX architecture is considered in which in order to be efficient the architecture has to be scalable across a wider set of post-silicon stages. We also discuss the need for establishing quick correlation between design validation and manufacturing test measurements and the time-to-market savings it brings for analog and IO content designed essentially on a digital process technology.","PeriodicalId":187545,"journal":{"name":"2015 IEEE 33rd VLSI Test Symposium (VTS)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 33rd VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2015.7116282","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The traditional focus of work in test has been innovation and efficiency for high volume manufacturing test. However, in reality, a significant amount of effort is expended on design validation and debug prior to deeming analog and high speed serial IO test stimuli content production worthy. In this presentation we emphasize the importance of widening the post-silicon envelope to include early design validation and debug in addition to manufacturing test. The impact on DFX architecture is considered in which in order to be efficient the architecture has to be scalable across a wider set of post-silicon stages. We also discuss the need for establishing quick correlation between design validation and manufacturing test measurements and the time-to-market savings it brings for analog and IO content designed essentially on a digital process technology.