Ultralow Power, 3.15 mW, 76.7 GHz Digitally Controlled Oscillator in 65 nm CMOS for High Data-Rate Application

Yanlu Wang, M. Wei, R. Negra
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引用次数: 2

Abstract

This paper presents an ultralow power 1-bit digitally controlled oscillator (DCO) for the application in high data-rate FSK transmitters. To design a low-power DCO, minimising the loss of the LC tank is very critical. Hence, a high quality factor (Q) multifinger capacitor and a high-Q centre-tapped inductor are proposed and designed. Simulated Q of the capacitor is more than 45 from 70 GHz to 80 GHz. It is at least 4.5 times higher than a typical metal-insulator-metal capacitor (MIMCAP). The proposed DCO based on the designed high-Q passives is fabricated in standard 65 nm CMOS. Measured foSC are 74. 1GHz and 76.7 GHz in the on-and off-state of the switch, respectively. It consumes only 3.15 mW DC power from a supply of 0. 75V which to the authors’ knowledge is the lowest power consumption reported so far in this frequency range.
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超低功耗,3.15 mW, 76.7 GHz的65纳米CMOS数字控制振荡器,用于高数据速率应用
提出了一种适用于高数据速率FSK发射机的超低功耗1位数字控制振荡器(DCO)。为了设计一个低功率的DCO,最大限度地减少LC槽的损耗是非常关键的。为此,提出并设计了高品质因数(Q)多指电容和高Q中心抽头电感。在70 ~ 80 GHz范围内,电容的模拟Q值大于45。它比典型的金属-绝缘体-金属电容器(MIMCAP)至少高4.5倍。基于所设计的高q无源的DCO在标准65nm CMOS上制作。测量的foSC为74。交换机的on和off状态分别为1GHz和76.7 GHz。它只消耗3.15兆瓦的直流电,从0。据作者所知,75V是迄今为止在该频率范围内报告的最低功耗。
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