A Build-in Gate Driver Design for 1.7kV SiC MOSFET Module with 32-chip Paralleled

Abstract

Improving current capability of SiC MOSFET is an essential topic for SiC applications. Modular package is a widely applied solution with outstanding power density and integration merit. More dies are paralleled into one module to improve power density, and an auxiliary circuit, like a gate driver, is packaged inside to enhance integration. In this paper, a built-in gate driver is designed to drive a 1.7kV/1.6kA, 32-chip paralleled SiC MOSFET module. To realize the desired feature of the module, corresponding design considerations of the gate driver are discussed. Firstly, the parameters related to driving capability are figured out following a design procedure. Secondly, the delay effect in a transmission line is discussed, and a model is built to analyze the gate-to-source voltage mismatch among dies assembled at different positions. A differentiated threshold voltage strategy for arranging and selecting dies is applied to cancel mismatches. Finally, double pulse test experiments prove the feasibility of the proposed gate driver and corresponding design methods.