Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131286
Shiyuan Yin, Mahmoud Mehrabankhomartash, D. Divan, M. Saeedifard
The isolated modular multilevel DC-DC (IM2DC) converter is promising to serve as a DC transformer in medium voltage (MV) or high voltage (HV) DC grids. The design and analysis of the IM2DC converter in the literature always assume constant capacitor voltages and neglect the voltage ripples for all sub-modules (SMs), so the modeling methods of the dual-active bridge (DAB) converter can be directly applied to the IM2DC converter. In this paper, the IM2DC converter is modeled based on the harmonic state-space (HSS) equations, so that the SM capacitor voltages ripple can be accurately captured. Then, the impacts of the SM capacitor voltages ripple on power transfer capability and circulating current are revealed. It is found that the SM capacitor voltages ripple can be utilized to boost the power transfer capability of the converter. The analysis is validated by both simulation and experimental results.
{"title":"A Power Boost Technique for the Isolated Modular Multilevel DC-DC Converter Based on Sub-module Capacitor Voltages Ripple","authors":"Shiyuan Yin, Mahmoud Mehrabankhomartash, D. Divan, M. Saeedifard","doi":"10.1109/APEC43580.2023.10131286","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131286","url":null,"abstract":"The isolated modular multilevel DC-DC (IM2DC) converter is promising to serve as a DC transformer in medium voltage (MV) or high voltage (HV) DC grids. The design and analysis of the IM2DC converter in the literature always assume constant capacitor voltages and neglect the voltage ripples for all sub-modules (SMs), so the modeling methods of the dual-active bridge (DAB) converter can be directly applied to the IM2DC converter. In this paper, the IM2DC converter is modeled based on the harmonic state-space (HSS) equations, so that the SM capacitor voltages ripple can be accurately captured. Then, the impacts of the SM capacitor voltages ripple on power transfer capability and circulating current are revealed. It is found that the SM capacitor voltages ripple can be utilized to boost the power transfer capability of the converter. The analysis is validated by both simulation and experimental results.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115134189","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131541
Dipayan Chatterjee, S. Kapat, Reddi Kiran Poola, Ravikumar Setty A, Sucheendran Sridharan
A boost converter-based LED driver is predominantly used in portable display devices, where the high voltage gain makes it difficult to achieve fast start-up and dimming performance, because of the detrimental effect of the right-half-plane (RHP) zero. In the majority of commercial products, a fixed-frequency current mode control (CMC) technique is used. This requires an over-compensated ramp for current-loop stability, which would tend to degrade the phase margin using a type-II compensator. Constant off-time (COFT) CMC may not require any ramp compensation and can achieve superior performance. However, suitable design methods are not readily available to identify performance limits using fixed-frequency and COFT CMC architectures. This paper presents the small-signal design and performance limitations of a type-II controller in CMC architectures. Thereafter, a trajectory-based design approach is developed to identify critical performance limits using a resettable PI controller, which can achieve near time-optimal performance with and without a peak current limit. Start-up performance is shown to be further improved by using a low voltage LED string, however, at the cost of an increasing pin count. Finally, a method is identified to achieve smooth controller transitions in a peak current-based constant on/off-time multi-mode controller. Experimental results of a few commercial LED drivers with their performance limits are presented, and for the same specs, the performance improvement using the proposed design framework is demonstrated using simulation results.
{"title":"Design Techniques in Constant on/off-Time Peak Current Controlled Boost LED Drivers for Fast Start-up and Dimming Transient Performance","authors":"Dipayan Chatterjee, S. Kapat, Reddi Kiran Poola, Ravikumar Setty A, Sucheendran Sridharan","doi":"10.1109/APEC43580.2023.10131541","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131541","url":null,"abstract":"A boost converter-based LED driver is predominantly used in portable display devices, where the high voltage gain makes it difficult to achieve fast start-up and dimming performance, because of the detrimental effect of the right-half-plane (RHP) zero. In the majority of commercial products, a fixed-frequency current mode control (CMC) technique is used. This requires an over-compensated ramp for current-loop stability, which would tend to degrade the phase margin using a type-II compensator. Constant off-time (COFT) CMC may not require any ramp compensation and can achieve superior performance. However, suitable design methods are not readily available to identify performance limits using fixed-frequency and COFT CMC architectures. This paper presents the small-signal design and performance limitations of a type-II controller in CMC architectures. Thereafter, a trajectory-based design approach is developed to identify critical performance limits using a resettable PI controller, which can achieve near time-optimal performance with and without a peak current limit. Start-up performance is shown to be further improved by using a low voltage LED string, however, at the cost of an increasing pin count. Finally, a method is identified to achieve smooth controller transitions in a peak current-based constant on/off-time multi-mode controller. Experimental results of a few commercial LED drivers with their performance limits are presented, and for the same specs, the performance improvement using the proposed design framework is demonstrated using simulation results.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115406092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131565
S. K. Dam, Ching-Hsiang Yang, Zhou Dong, Dehao Qin, Ruirui Chen, Fred Wang, Hua Bai, Zheyu Zhang
Operating power converters at cryogenic temperature (<-153°C) can improve efficiency and power density. However, the reliable operation of power converters depends on satisfactory performance of all critical components at cryogenic temperature. While most of the critical components have been studied at cryogenic temperatures, some electronic components necessary for electrical isolation in signal circuits of a medium voltage power converter are yet to be evaluated extensively. This work studies the cryogenic performance of isolated auxiliary power supplies (APS), digital isolators, fiber optics, and isolation amplifiers to identify the well-performing candidates and to investigate the possible reason of failures at cryogenic temperatures. It is observed that some isolated APS with high isolation voltage and isolation amplifiers can work satisfactorily at cryogenic temperatures. The digital isolators are found to be more suitable for cryogenic operation than fiber optic links, even though the latter has better noise immunity.
{"title":"Experimental Evaluation of Cryogenic Performances of Electronic Components for Signal Isolation in Medium Voltage Power Converters","authors":"S. K. Dam, Ching-Hsiang Yang, Zhou Dong, Dehao Qin, Ruirui Chen, Fred Wang, Hua Bai, Zheyu Zhang","doi":"10.1109/APEC43580.2023.10131565","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131565","url":null,"abstract":"Operating power converters at cryogenic temperature (<-153°C) can improve efficiency and power density. However, the reliable operation of power converters depends on satisfactory performance of all critical components at cryogenic temperature. While most of the critical components have been studied at cryogenic temperatures, some electronic components necessary for electrical isolation in signal circuits of a medium voltage power converter are yet to be evaluated extensively. This work studies the cryogenic performance of isolated auxiliary power supplies (APS), digital isolators, fiber optics, and isolation amplifiers to identify the well-performing candidates and to investigate the possible reason of failures at cryogenic temperatures. It is observed that some isolated APS with high isolation voltage and isolation amplifiers can work satisfactorily at cryogenic temperatures. The digital isolators are found to be more suitable for cryogenic operation than fiber optic links, even though the latter has better noise immunity.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115705349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131221
M. T. Fard, Jiangbiao He, Milad Sadoughi, B. Mirafzal, Fariba Fateh
High dv/dt from the emerging SiC variable-frequency drives can easily induce overvoltage across the motor stator winding terminals, especially for long-cable-connected and high-voltage motor-drive systems. Due to the fast switching speed and surge impedance mismatch between cables and motors, this overvoltage can be two times or even higher than the DC-bus voltage of the inverter, resulting in motor insulation degradation or irreversible breakdown. The most common solution to mitigate such overvoltage is to install a dv/dt or a sinewave filter at the output of the drive, which decreases the efficiency and power density of the system. Among different stator coils, the first one (close to the drive side) is the most susceptible to insulation breakdown since it experiences higher overvoltage than the others due to the nonlinear distribution of the reflected surge voltages. In this paper, an innovative high-efficiency ultracompact mitigation solution is introduced, which is a tiny auxiliary circuit embedded inside the motor stator (or at the motor terminal box), specifically across the first few coils of each phase (i.e., smart coils). The proposed smart coil circuit effectively mitigates the surge overvoltage, which can be scalable to any type of motor-drive systems, regardless of cable length and semiconductor rise time. The proposed solution can dramatically improve the reliability, efficiency, and power density of motor-drive systems.
{"title":"Smart Coils for Mitigation of Motor Reflected Overvoltage Fed by SiC Drives","authors":"M. T. Fard, Jiangbiao He, Milad Sadoughi, B. Mirafzal, Fariba Fateh","doi":"10.1109/APEC43580.2023.10131221","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131221","url":null,"abstract":"High dv/dt from the emerging SiC variable-frequency drives can easily induce overvoltage across the motor stator winding terminals, especially for long-cable-connected and high-voltage motor-drive systems. Due to the fast switching speed and surge impedance mismatch between cables and motors, this overvoltage can be two times or even higher than the DC-bus voltage of the inverter, resulting in motor insulation degradation or irreversible breakdown. The most common solution to mitigate such overvoltage is to install a dv/dt or a sinewave filter at the output of the drive, which decreases the efficiency and power density of the system. Among different stator coils, the first one (close to the drive side) is the most susceptible to insulation breakdown since it experiences higher overvoltage than the others due to the nonlinear distribution of the reflected surge voltages. In this paper, an innovative high-efficiency ultracompact mitigation solution is introduced, which is a tiny auxiliary circuit embedded inside the motor stator (or at the motor terminal box), specifically across the first few coils of each phase (i.e., smart coils). The proposed smart coil circuit effectively mitigates the surge overvoltage, which can be scalable to any type of motor-drive systems, regardless of cable length and semiconductor rise time. The proposed solution can dramatically improve the reliability, efficiency, and power density of motor-drive systems.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123156908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131506
B. O'Sullivan, Z. Pavlović, N. Fiebig, C. O'Mathúna, S. O’Driscoll
This paper presents the design of an isolated gate driver system using a low volt-second differential pulse scheme to enable the use of a thin-film magnetics-on-silicon coupled solenoid transformer. The transformer was designed for a CMOS compatible back-end-of-line (BEOL) process to ultimately enable monolithic integration with the gate driver. The transformer enables primary side or functional isolation of the gate driver with very low propagation delay and low CIO. The design of a prototype custom 130 nm CMOS gate-driver signal-coupling chipset around this transformer achieved operation with sub 10 V.ns gate driver signal pulses. The prototype system simulated a common-mode transient immunity (CMTI) to a switch-node slewing rate of 34 V/ns but simulations on an improved design achieved CMTI of 200 V/ ns. The gate driver system design presented is applicable for advanced heterogeneous integration of thin-film magnetically isolated gate driver chipsets for a variety of power switch technologies including DMOS, GaN, and SiC.
{"title":"Gate Driver Chip-Set using Low Volt-Second Pulse Transformer for Galvanic Signal Isolation","authors":"B. O'Sullivan, Z. Pavlović, N. Fiebig, C. O'Mathúna, S. O’Driscoll","doi":"10.1109/APEC43580.2023.10131506","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131506","url":null,"abstract":"This paper presents the design of an isolated gate driver system using a low volt-second differential pulse scheme to enable the use of a thin-film magnetics-on-silicon coupled solenoid transformer. The transformer was designed for a CMOS compatible back-end-of-line (BEOL) process to ultimately enable monolithic integration with the gate driver. The transformer enables primary side or functional isolation of the gate driver with very low propagation delay and low CIO. The design of a prototype custom 130 nm CMOS gate-driver signal-coupling chipset around this transformer achieved operation with sub 10 V.ns gate driver signal pulses. The prototype system simulated a common-mode transient immunity (CMTI) to a switch-node slewing rate of 34 V/ns but simulations on an improved design achieved CMTI of 200 V/ ns. The gate driver system design presented is applicable for advanced heterogeneous integration of thin-film magnetically isolated gate driver chipsets for a variety of power switch technologies including DMOS, GaN, and SiC.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115753738","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131203
Andreas Schorer, M. Shousha, Sebastian Pfennig, M. Haug, Lorandt Fölkel, M. Brooks, J. Groten, Oliver Werzer
This paper presents a full energy harvesting system for harvesting mechanical energy from internal combustion engines to power low power autonomous sensor systems inside of the engine to record and wirelessly transmit the piston temperatures. Due to the reciprocating movement of the pistons, sensors cannot be connected to the cars electrical system by wires and thus are usually powered by batteries. Changing those batteries is a time consuming process since large parts of the engine needs to be taken apart to get to the pistons. This is the reason why we present a system that uses a piezoelectric nano generator (PENG) based on flexible PVDF to convert a small amount of the mechanical energy of the pistons to electrical energy. A power management system (PMS) including a maximum power point (MPP) circuit maximizes the power output of the harvester and supplies a regulated dc voltage to the sensor. The MPP circuit used in this design has a very few components, thus keeping its own power consumption low. It requires a minimum input voltage of 3V and a minimum power of 1.4µW during operation. During startup, a power of 4µW is required for a short time until the input capacitor of thre PMS is charged to 1.8V. Measurements show an increase of up to 44% of harvested power while also allowing higher output voltages compared to the same power management system without an MPP circuit. A prototype to emulate the movement of the pistons was built and tested with the PENG and PMS. At 600rpm, data transmission is possible every 90 seconds with 3.5µW harvested power.
{"title":"A Batteryless Full Energy Harvesting System for Inside-Engine Temperature Sensors","authors":"Andreas Schorer, M. Shousha, Sebastian Pfennig, M. Haug, Lorandt Fölkel, M. Brooks, J. Groten, Oliver Werzer","doi":"10.1109/APEC43580.2023.10131203","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131203","url":null,"abstract":"This paper presents a full energy harvesting system for harvesting mechanical energy from internal combustion engines to power low power autonomous sensor systems inside of the engine to record and wirelessly transmit the piston temperatures. Due to the reciprocating movement of the pistons, sensors cannot be connected to the cars electrical system by wires and thus are usually powered by batteries. Changing those batteries is a time consuming process since large parts of the engine needs to be taken apart to get to the pistons. This is the reason why we present a system that uses a piezoelectric nano generator (PENG) based on flexible PVDF to convert a small amount of the mechanical energy of the pistons to electrical energy. A power management system (PMS) including a maximum power point (MPP) circuit maximizes the power output of the harvester and supplies a regulated dc voltage to the sensor. The MPP circuit used in this design has a very few components, thus keeping its own power consumption low. It requires a minimum input voltage of 3V and a minimum power of 1.4µW during operation. During startup, a power of 4µW is required for a short time until the input capacitor of thre PMS is charged to 1.8V. Measurements show an increase of up to 44% of harvested power while also allowing higher output voltages compared to the same power management system without an MPP circuit. A prototype to emulate the movement of the pistons was built and tested with the PENG and PMS. At 600rpm, data transmission is possible every 90 seconds with 3.5µW harvested power.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115831405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131259
A. Milic, S. Vukosavic
The paper presents the design of an induction motor speed estimator based on rotor slot harmonics with the focus placed on analyzing its integration within the current and speed control loops. The PLL based estimator consists of the digital adaptive filters and the information is obtained on a sample-by-sample basis at 50 kHz rate. The estimator parameters design is based on the control loop requirements. The main advantages of the presented structure are the transport delay of 10 ms and steady state error below 0.12%. The estimators' outputs are used as a feedback signal for the speed and vector control, as a replacement for typically used rotor position sensors. The experimental results demonstrate the speed and vector sensor-less closed-loop operation on three-phase 2.2 kW induction motor, with 15 Hz speed closed-loop bandwidth. The operation is demonstrated in a wide speed range of the motor, including very low speeds.
{"title":"Sensorless Speed and Vector Control of Induction Motor Based on Rotor Slot Harmonics","authors":"A. Milic, S. Vukosavic","doi":"10.1109/APEC43580.2023.10131259","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131259","url":null,"abstract":"The paper presents the design of an induction motor speed estimator based on rotor slot harmonics with the focus placed on analyzing its integration within the current and speed control loops. The PLL based estimator consists of the digital adaptive filters and the information is obtained on a sample-by-sample basis at 50 kHz rate. The estimator parameters design is based on the control loop requirements. The main advantages of the presented structure are the transport delay of 10 ms and steady state error below 0.12%. The estimators' outputs are used as a feedback signal for the speed and vector control, as a replacement for typically used rotor position sensors. The experimental results demonstrate the speed and vector sensor-less closed-loop operation on three-phase 2.2 kW induction motor, with 15 Hz speed closed-loop bandwidth. The operation is demonstrated in a wide speed range of the motor, including very low speeds.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124272959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131151
Yujia Cui, Jiangang Hu, R. Tallam, Robert Miklosovic, N. Zargari
This paper proposes a new prognostics analysis approach for power electronics by combining physics-based and data-driven techniques. Starting with Weibull degradation model, machine learning (ML) techniques are applied to degradation data progressively for continuous reliability monitoring and predictive maintenance decision-making. No prior knowledge of components or mission profiles is required for model training and prediction. Extracted features from analysis can be used to cluster the iteration-based predictions effectively. Another advantage is abrupt change of operation condition can be captured through machine learning for potential lifetime improvement through predictive maintenance. Proposed method can be generalized to other hardware components beyond power electronics.
{"title":"Reliability Monitoring and Predictive Maintenance of Power Electronics with Physics and Data Driven Approach Based on Machine Learning","authors":"Yujia Cui, Jiangang Hu, R. Tallam, Robert Miklosovic, N. Zargari","doi":"10.1109/APEC43580.2023.10131151","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131151","url":null,"abstract":"This paper proposes a new prognostics analysis approach for power electronics by combining physics-based and data-driven techniques. Starting with Weibull degradation model, machine learning (ML) techniques are applied to degradation data progressively for continuous reliability monitoring and predictive maintenance decision-making. No prior knowledge of components or mission profiles is required for model training and prediction. Extracted features from analysis can be used to cluster the iteration-based predictions effectively. Another advantage is abrupt change of operation condition can be captured through machine learning for potential lifetime improvement through predictive maintenance. Proposed method can be generalized to other hardware components beyond power electronics.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120994774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131587
Hyung-Woo Lee, Kyo-Beum Lee
This paper presents the voltage modulation method to reduce switching loss of dual inverters fed open-end wingding interior permanent magnet synchronous motor (OEW-IPMSM). the dual inverters motor drive system that employs an open-end winding motor is increasingly used because of its advantages, such as being able to boost a voltage and a multi-level effect caused by the structure of a topology. However, in a dual inverters system, essentially the system operates through two inverters, so an increase of switching loss acts as an inevitable disadvantage of the system. This paper proposes a voltage modulation technique for reducing the switching loss of dual inverter for driving OEW-IPMSM. The proposed voltage modulation method operates on the basis of level-shift and discontinuous pulse width modulation (DPWM) and significantly reduces switching loss compared to the conventional voltage modulation technique of the dual inverters. The validity of the proposed voltage modulation method of dual inverters is verified by the simulation results.
{"title":"Switching Loss Reduction of Dual Inverters using Isolated Voltage Sources Fed an Open-End Winding Interior Permanent Magnet Synchronous Motor","authors":"Hyung-Woo Lee, Kyo-Beum Lee","doi":"10.1109/APEC43580.2023.10131587","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131587","url":null,"abstract":"This paper presents the voltage modulation method to reduce switching loss of dual inverters fed open-end wingding interior permanent magnet synchronous motor (OEW-IPMSM). the dual inverters motor drive system that employs an open-end winding motor is increasingly used because of its advantages, such as being able to boost a voltage and a multi-level effect caused by the structure of a topology. However, in a dual inverters system, essentially the system operates through two inverters, so an increase of switching loss acts as an inevitable disadvantage of the system. This paper proposes a voltage modulation technique for reducing the switching loss of dual inverter for driving OEW-IPMSM. The proposed voltage modulation method operates on the basis of level-shift and discontinuous pulse width modulation (DPWM) and significantly reduces switching loss compared to the conventional voltage modulation technique of the dual inverters. The validity of the proposed voltage modulation method of dual inverters is verified by the simulation results.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121349913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131532
Aditya P, V. I, Satish Naik Banavath, A. Chub, Xiaoqing Song, D. Vinnikov, Fred Wang
The global carbon footprint from the aviation sector is seeing a steep increase in the past half-century. To combat this challenge, electrifying the aircraft is a promising solution. Howbeit, the idea of aircraft electrification is introducing various dc power distribution architectures, increasing the complexity of aircraft electric power systems (EPS). The aircraft EPS is of low voltage and makes the system handle huge currents. Alongside this, the next-generation aircraft power system demands faster and more reliable protection. Solid-state circuit breakers (SSCBs) offer fast fault interruption capability and make the protection system compact. This article proposes a modified Q-Z-source (MQZSCB) dc circuit breaker (DCCB) topology that employs a thyristor as the main fault-interrupting device and uses a coupled inductor for its commutation during faults. Also, it employs fewer components, thereby reducing the weight/volume of the system, which benefits the design aspects of the aircraft. The proposed topology can interrupt the fault approximately within $400mu {mathrm{s}}$. Moreover, this topology is advantageous to the existing QZSCB by mitigating the issues of negative current flow through the load, especially during reclosing, and unwanted power flow to the load during the QZSCB commissioning. The proposed solution also enables reduced current stress on the thyristor during reclosing. A prototype rated at 270V/10A has been developed to address the issues and validate the performance of the proposed MQZSCB.
{"title":"Modified Q-Z-Source DC Circuit Breaker for Next-Generation Electric Aircrafts","authors":"Aditya P, V. I, Satish Naik Banavath, A. Chub, Xiaoqing Song, D. Vinnikov, Fred Wang","doi":"10.1109/APEC43580.2023.10131532","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131532","url":null,"abstract":"The global carbon footprint from the aviation sector is seeing a steep increase in the past half-century. To combat this challenge, electrifying the aircraft is a promising solution. Howbeit, the idea of aircraft electrification is introducing various dc power distribution architectures, increasing the complexity of aircraft electric power systems (EPS). The aircraft EPS is of low voltage and makes the system handle huge currents. Alongside this, the next-generation aircraft power system demands faster and more reliable protection. Solid-state circuit breakers (SSCBs) offer fast fault interruption capability and make the protection system compact. This article proposes a modified Q-Z-source (MQZSCB) dc circuit breaker (DCCB) topology that employs a thyristor as the main fault-interrupting device and uses a coupled inductor for its commutation during faults. Also, it employs fewer components, thereby reducing the weight/volume of the system, which benefits the design aspects of the aircraft. The proposed topology can interrupt the fault approximately within $400mu {mathrm{s}}$. Moreover, this topology is advantageous to the existing QZSCB by mitigating the issues of negative current flow through the load, especially during reclosing, and unwanted power flow to the load during the QZSCB commissioning. The proposed solution also enables reduced current stress on the thyristor during reclosing. A prototype rated at 270V/10A has been developed to address the issues and validate the performance of the proposed MQZSCB.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127190706","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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