H. Shimizu, Takeru Suto, H. Miki, Y. Mori, D. Hisamoto, A. Shima, K. Kinoshita, T. Murata, T. Oda
{"title":"Proposal of Vertical-channel Fin-SiC MOSFET toward Future Device Scaling","authors":"H. Shimizu, Takeru Suto, H. Miki, Y. Mori, D. Hisamoto, A. Shima, K. Kinoshita, T. Murata, T. Oda","doi":"10.1109/ISPSD57135.2023.10147561","DOIUrl":null,"url":null,"abstract":"We propose a new SiC trench MOSFET suitable for achieving both low loss and high reliability. This structure, called a VC Fin-SiC, is characterized by a fin-shaped trench, and by adopting a wide channel formed on the sidewall of the fin and a narrow JFET with high dopant concentration, it achieves both low on-resistance and high reliability. In this work, these design concepts are verified through simulation and actual device fabrication. Because the VC Fin-SiC has channels directly above the JFET structure, the performance can be easily improved by scaling the fin-pitch and channel length, and it will be one of the most promising structures in the future.","PeriodicalId":344266,"journal":{"name":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD57135.2023.10147561","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We propose a new SiC trench MOSFET suitable for achieving both low loss and high reliability. This structure, called a VC Fin-SiC, is characterized by a fin-shaped trench, and by adopting a wide channel formed on the sidewall of the fin and a narrow JFET with high dopant concentration, it achieves both low on-resistance and high reliability. In this work, these design concepts are verified through simulation and actual device fabrication. Because the VC Fin-SiC has channels directly above the JFET structure, the performance can be easily improved by scaling the fin-pitch and channel length, and it will be one of the most promising structures in the future.