Universal recovery behavior of negative bias temperature instability [PMOSFETs]

S. Rangan, N. Mielke, E.C.C. Yeh
{"title":"Universal recovery behavior of negative bias temperature instability [PMOSFETs]","authors":"S. Rangan, N. Mielke, E.C.C. Yeh","doi":"10.1109/IEDM.2003.1269294","DOIUrl":null,"url":null,"abstract":"PMOSFETs experiencing negative bias temperature instability (NBTI) recover after stress is removed. We show for the first time that: (1) the recovery can reach 100% at 25/spl deg/C; (2) recovery has a universal behavior independent of stress voltage, stress time and temperature (below 25/spl deg/C); and (3) the recovered devices degrade at the same rate when re-stressed, indicating that recovery resets the degraded device to its original state. We propose a three step model to describe this mechanism: (i) voltage accelerated degradation, (ii) bias and degradation independent recovery and (iii) temperature driven \"lock-in\" step. We believe that the competing effects of these three steps corrupt common field/temperature acceleration models for NBTI.","PeriodicalId":344286,"journal":{"name":"IEEE International Electron Devices Meeting 2003","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"290","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Electron Devices Meeting 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2003.1269294","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 290

Abstract

PMOSFETs experiencing negative bias temperature instability (NBTI) recover after stress is removed. We show for the first time that: (1) the recovery can reach 100% at 25/spl deg/C; (2) recovery has a universal behavior independent of stress voltage, stress time and temperature (below 25/spl deg/C); and (3) the recovered devices degrade at the same rate when re-stressed, indicating that recovery resets the degraded device to its original state. We propose a three step model to describe this mechanism: (i) voltage accelerated degradation, (ii) bias and degradation independent recovery and (iii) temperature driven "lock-in" step. We believe that the competing effects of these three steps corrupt common field/temperature acceleration models for NBTI.
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负偏置温度不稳定性的普遍恢复行为[pmosfet]
经历负偏置温度不稳定性(NBTI)的pmosfet在去除应力后恢复。结果表明:(1)在25℃/spl条件下,采收率可达100%;(2)恢复具有普遍的特性,与应力电压、应力时间和温度(低于25℃)无关;(3)恢复后的设备在再次受力时以相同的速率降级,表明恢复将降级的设备复位到其原始状态。我们提出了一个三步模型来描述这一机制:(i)电压加速退化,(ii)偏置和退化无关的恢复和(iii)温度驱动的“锁定”步骤。我们认为这三个步骤的竞争效应破坏了NBTI的普通场/温度加速模型。
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