Micro-2010: lead performance microprocessor of the year 2010-myth or reality?

M. Khaira
{"title":"Micro-2010: lead performance microprocessor of the year 2010-myth or reality?","authors":"M. Khaira","doi":"10.1109/ICVD.1999.745141","DOIUrl":null,"url":null,"abstract":"Can you imagine working on a PC powered by a processor with 100 BIPS (Billion Instructions Per Sec) of performance? Is a processor with 1 Billion transistors a reality? This talk describes what the Micro-2010 will be like and identifies the challenges involved in its design. We expect all aspects of life to be impacted by Micro-2010. Applications like tele-presence, augmented reality, and reality animation indicate that such microprocessor performance will be a critical enabling technology. This talk makes an attempt to describe the characteristic features of the microprocessors of 2010, and identifies the challenges involved in their design and test. Micro-2010 will run at a frequency in excess of 4 gigaHertz. Getting to that level of performance while meeting the power budget (<100 Watts) and area budget (<$500 cost) will require breakthroughs in circuit design methodologies, CAD tools and technologies, and process technology. If current design methodology trends continue, designing Micro-2010 will require every single VLSI design engineer graduating after 2005 to be hired into the team designing it! This implies that major breakthroughs in design methodology, enabled by a new generation of CAD tools, is essential for these designs to become a reality. The semiconductor process in 2010 will have a minimum feature size less than 0.1 micron and the transistors a gate oxide of the thickness of less than the height of 10 layers of silicon dioxide molecules. These dimensions are smaller than the wavelength of visible light and will require major breakthroughs in process technology. Given the expected volume of shipment of Micro-2010, an errata like the FDIV cannot be tolerated without severe financial ramifications. Avoiding errata in a 1 Billion Transistor design is practically impossible. The talk will identify specific research directions in the areas of design and CAD tools to meet the challenges of design of the Micro-2010 and propose potential solutions.","PeriodicalId":443373,"journal":{"name":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","volume":"212 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVD.1999.745141","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

Can you imagine working on a PC powered by a processor with 100 BIPS (Billion Instructions Per Sec) of performance? Is a processor with 1 Billion transistors a reality? This talk describes what the Micro-2010 will be like and identifies the challenges involved in its design. We expect all aspects of life to be impacted by Micro-2010. Applications like tele-presence, augmented reality, and reality animation indicate that such microprocessor performance will be a critical enabling technology. This talk makes an attempt to describe the characteristic features of the microprocessors of 2010, and identifies the challenges involved in their design and test. Micro-2010 will run at a frequency in excess of 4 gigaHertz. Getting to that level of performance while meeting the power budget (<100 Watts) and area budget (<$500 cost) will require breakthroughs in circuit design methodologies, CAD tools and technologies, and process technology. If current design methodology trends continue, designing Micro-2010 will require every single VLSI design engineer graduating after 2005 to be hired into the team designing it! This implies that major breakthroughs in design methodology, enabled by a new generation of CAD tools, is essential for these designs to become a reality. The semiconductor process in 2010 will have a minimum feature size less than 0.1 micron and the transistors a gate oxide of the thickness of less than the height of 10 layers of silicon dioxide molecules. These dimensions are smaller than the wavelength of visible light and will require major breakthroughs in process technology. Given the expected volume of shipment of Micro-2010, an errata like the FDIV cannot be tolerated without severe financial ramifications. Avoiding errata in a 1 Billion Transistor design is practically impossible. The talk will identify specific research directions in the areas of design and CAD tools to meet the challenges of design of the Micro-2010 and propose potential solutions.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Micro-2010: 2010年度领先性能微处理器——神话还是现实?
你能想象在一台由100 BIPS(每秒十亿指令)处理器驱动的PC上工作吗?拥有10亿个晶体管的处理器是现实吗?这次演讲描述了Micro-2010将会是什么样子,并确定了其设计中涉及的挑战。我们预计Micro-2010将影响生活的方方面面。远程呈现、增强现实和现实动画等应用表明,这种微处理器性能将是一项关键的使能技术。本演讲试图描述2010年微处理器的特征,并确定其设计和测试中涉及的挑战。Micro-2010将以超过4千兆赫兹的频率运行。在满足功率预算(<100瓦)和面积预算(< 500美元成本)的同时,要达到这一性能水平,需要在电路设计方法、CAD工具和技术以及工艺技术方面取得突破。如果目前的设计方法趋势继续下去,设计Micro-2010将需要聘请2005年以后毕业的每一个VLSI设计工程师来设计它!这意味着设计方法的重大突破,由新一代CAD工具实现,对于这些设计成为现实至关重要。2010年的半导体工艺将使最小特征尺寸小于0.1微米,晶体管的栅极氧化物厚度小于10层二氧化硅分子的高度。这些尺寸小于可见光的波长,需要在工艺技术上取得重大突破。考虑到Micro-2010的预期出货量,像FDIV这样的勘误表是不能容忍的,否则会产生严重的财务后果。在一个10亿晶体管的设计中避免误差几乎是不可能的。讲座将探讨设计和CAD工具领域的具体研究方向,以应对Micro-2010设计的挑战,并提出潜在的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Improved effective capacitance computations for use in logic and layout optimization Assignment and reordering of incompletely specified pattern sequences targetting minimum power dissipation FzCRITIC-a functional timing verifier using a novel fuzzy delay model Verifying Tomasulo's algorithm by refinement Superscalar processor validation at the microarchitecture level
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1