Zijian Zhang, Xuehao Tang, Kai Chen, Suyang Liu, M. Inuishi
{"title":"Novel Complementary Lateral IGBTs on Bulk Silicon with Multiple Buried Layers for Perfect Isolation and High Performance","authors":"Zijian Zhang, Xuehao Tang, Kai Chen, Suyang Liu, M. Inuishi","doi":"10.1109/ISPSD57135.2023.10147517","DOIUrl":null,"url":null,"abstract":"This work proposes the structures for n-channel and p-channel lateral IGBT on bulk silicon to achieve the complementary inverter leg. The double buried layer for n-channel and the triple buried layer for p-channel are introduced. These structures can eliminate the substrate current of bulk silicon completely, achieving perfect isolation. Also, with sufficient thickness of epitaxial layer to support the voltage drop, the forward blocking voltage can be ensured. Furthermore, the top buried layers of the n-channel and the p-channel IGBT are formed to extract minority carriers to achieve the fast turn-off time. Finally, it is verified that the emitter follower type complementary inverter leg can be operated without penetration current.","PeriodicalId":344266,"journal":{"name":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD57135.2023.10147517","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This work proposes the structures for n-channel and p-channel lateral IGBT on bulk silicon to achieve the complementary inverter leg. The double buried layer for n-channel and the triple buried layer for p-channel are introduced. These structures can eliminate the substrate current of bulk silicon completely, achieving perfect isolation. Also, with sufficient thickness of epitaxial layer to support the voltage drop, the forward blocking voltage can be ensured. Furthermore, the top buried layers of the n-channel and the p-channel IGBT are formed to extract minority carriers to achieve the fast turn-off time. Finally, it is verified that the emitter follower type complementary inverter leg can be operated without penetration current.