Early-stage verification of power-management specification in low-power systems design

Abstract

Power consumption becomes a dominant problem in current hardware-systems design. It is most commonly dealt with use of power-management techniques, such as clock gating, power gating, or voltage and frequency scaling. In modern complex systems, power-management adoption is difficult to achieve, and therefore new approaches to simplify power-managed systems design are evolving. We have also proposed such an approach, simplifying power-management specification at the system level of design abstraction. This paper describes the proposed verification approach, which can take place continuously, beginning at the early specification stage of the system development. It helps a designer to create correct and consistent specification of power management.