A 6 kV ESD-Protected Low-Power 24 GHz LNA for Radar Applications in SiGe BiCMOS

Abstract

This paper presents a low-power, ESD-protected 24 GHz single-ended input to differential output single-stage cascode LNA in Infineon's SiGe BiCMOS technology. The proposed circuit uses bridged T-coils as loads to provide an inductive voltage divider for impedance transformation and extend the bandwidth. To reduce power consumption, the circuit operates from a low supply voltage of 1.5 V. Therefore, to compensate for reduced linearity the circuit uses a multi-tanh doublet. At the center frequency of 24 GHz the amplifier offers a gain of 12 dB and a noise figure of 2.6 dB including the on-chip input balun. The circuit exhibits a competitive linearity of −10 dBm input-referred 1dB compression point at 24 GHz. The LNA consumes 18 mA from a single 1.5 V supply. The ESD hardness has been investigated using an HBM pulse generator. The circuit exhibits a 6 kV HBM hardness at the input RF pin. The chip size including the pads is 0.49 mm2.