ASIC education at Tampere University of Technology

Third Annual IEEE Proceedings on ASIC Seminar and Exhibit Pub Date : 1990-09-17 DOI:10.1109/ASIC.1990.186158

H. Tenhunen, T. Korpiharju

引用次数: 1

Abstract

The ASIC education program at the Tampere University of Technology is discussed. The design tools, educational activities, and foundry services are described. Hardware description languages and system-level simulations are adopted from basic design courses to shift the emphasis in education from layout-level descriptions towards ASIC system oriented designs at undergraduate level. Silicon foundry services through FINCHIP, NORCHIP, and EUROCHIP with field programmable gate array structures from Xilinx and Actel are utilized.<>

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坦佩雷理工大学的ASIC教育

讨论了坦佩雷理工大学的ASIC教育项目。介绍了设计工具、教育活动和铸造服务。从基础设计课程中引入硬件描述语言和系统级仿真，使本科阶段的教学重点从布图级描述转向面向ASIC系统的设计。通过FINCHIP、NORCHIP和EUROCHIP提供的硅代工服务，以及Xilinx和Actel的现场可编程门阵列结构。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Third Annual IEEE Proceedings on ASIC Seminar and Exhibit

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