Christopher Bell, Matthew Lewandowski, S. Katkoori
{"title":"A multi-parameter functional side-channel analysis method for hardware trust verification","authors":"Christopher Bell, Matthew Lewandowski, S. Katkoori","doi":"10.1109/VTS.2013.6548923","DOIUrl":null,"url":null,"abstract":"A hardware Trojan is a modification to a hardware design which inserts undesired or malicious functionality. They pose a substantial security risk, and as such, rapid, reliable detection of these Trojans has become a critical necessity. In this paper, we propose a method for detecting compromised designs quickly and effectively. The method involves a multi-parameter analysis of the design and statistical analysis to determine which designs have been compromised. We also briefly discuss a supplemental method of confirming our results using a targeted method of FPGA design analysis. This method was proposed for consideration in the Cyber Security Awareness Week (CSAW) 2012 Embedded Systems Challenge (ESC) hosted by the Polytechnic Institute of New York University. This served to independently verify our results. The method was awarded first place in the competition.","PeriodicalId":138435,"journal":{"name":"2013 IEEE 31st VLSI Test Symposium (VTS)","volume":"1 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 31st VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2013.6548923","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A hardware Trojan is a modification to a hardware design which inserts undesired or malicious functionality. They pose a substantial security risk, and as such, rapid, reliable detection of these Trojans has become a critical necessity. In this paper, we propose a method for detecting compromised designs quickly and effectively. The method involves a multi-parameter analysis of the design and statistical analysis to determine which designs have been compromised. We also briefly discuss a supplemental method of confirming our results using a targeted method of FPGA design analysis. This method was proposed for consideration in the Cyber Security Awareness Week (CSAW) 2012 Embedded Systems Challenge (ESC) hosted by the Polytechnic Institute of New York University. This served to independently verify our results. The method was awarded first place in the competition.