High performance interpolation filter using direct computation

Ratshih S. Abd El-Azeem, M. El-Moursy, A. Nassar, A. Gharib, Nahla T. Abou-El-Kheir, Moataz S. El-Kharashi
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引用次数: 2

Abstract

A Computational Filter (CF) that employs a sample calculation functional block is presented. CF significantly reduces the hardware requirements to realize an interpolation filter. The Computational Filter is compared with advanced Finite Impulse Response (CFIR). CFIR programmable filter is implemented using Computation Sharing Multiplication (CSHM) technique to optimize the conventional design. The proposed CF significantly reduces the implementation area as compared to CFIR. The maximum average error for wide range of interpolation factors from 8 to 256 is less than 3% for CF and 0.02 %for CFIR. Xilinx Virtex5 FPGA XC5VTX240T device is used to compare the proposed design and the advanced CFIR for different interpolation factors. The Computational Filter average reduction in hardware implementation is between 78.8 % and 97.1% for interpolation factor of 8 to 64. The maximum operating frequency for the CFIR is 1 MHZ.
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使用直接计算的高性能插值滤波器
提出了一种采用示例计算功能块的计算滤波器(CF)。CF显著降低了实现插值滤波器的硬件要求。将计算滤波器与先进的有限脉冲响应(CFIR)进行了比较。采用计算共享乘法(CSHM)技术对传统设计进行优化,实现了CFIR可编程滤波器。与CFIR相比,拟议的CF显着减少了实施区域。在8 ~ 256的大范围内,CF的最大平均误差小于3%,CFIR的最大平均误差小于0.02%。采用Xilinx Virtex5 FPGA XC5VTX240T器件,对不同插补因子下提出的设计与先进的CFIR进行比较。当插值因子为8到64时,计算滤波器在硬件实现中的平均降低率在78.8%到97.1%之间。CFIR的最大工作频率为1mhz。
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